aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorolivier <olivier@FreeBSD.org>2017-01-13 05:40:06 +0800
committerolivier <olivier@FreeBSD.org>2017-01-13 05:40:06 +0800
commitb4550014b5c3e6afe6594e55c46b4e1b2d5b0b28 (patch)
treeed652634482180054366703a9b1102631e4220fc
parent8889d36318ab2e08e14340f0973c26016971da31 (diff)
downloadfreebsd-ports-gnome-b4550014b5c3e6afe6594e55c46b4e1b2d5b0b28.tar.gz
freebsd-ports-gnome-b4550014b5c3e6afe6594e55c46b4e1b2d5b0b28.tar.zst
freebsd-ports-gnome-b4550014b5c3e6afe6594e55c46b4e1b2d5b0b28.zip
Add MIPS support and other fixes
PR: 215938 - Main PR that merge all Submitted by: luca.pizzamiglio@gmail.com (maintainer) PR: 215783 - Add MIPS support Submitted by: jhb Sponsored by: DARPA / AFRL PR: 215868 - Fix build on powerpc architecture Reported by: Mark Millard PR: 212607 - Add a workaround to mitigate gdb hangs under some circumstances with multi-threaded applications (thanks to misc-freebsd-bugzilla@talk2dom.com) Reported by: tijl PR: 215578 - Fix build by removing option to use system readline Reported by: rozhuk.im@gmail.com
Diffstat
-rw-r--r--devel/gdb/Makefile18
-rw-r--r--devel/gdb/distinfo2
-rw-r--r--devel/gdb/files/commit-387360daf91360
-rw-r--r--devel/gdb/files/commit-b268007c68382
-rw-r--r--devel/gdb/files/extrapatch-base-readline11
-rw-r--r--devel/gdb/files/extrapatch-kgdb159
-rw-r--r--devel/gdb/files/kgdb/mipsfbsd-kern.c610
-rw-r--r--devel/gdb/files/kgdb/ppcfbsd-kern.c2
-rw-r--r--devel/gdb/files/kgdb/sparc64fbsd-kern.c6
-rw-r--r--devel/gdb/files/patch-gdb-fbsd-nat.c16
10 files changed, 2464 insertions, 102 deletions
diff --git a/devel/gdb/Makefile b/devel/gdb/Makefile
index e266e0670983..4b2613ff43be 100644
--- a/devel/gdb/Makefile
+++ b/devel/gdb/Makefile
@@ -3,6 +3,7 @@
PORTNAME= gdb
PORTVERSION= 7.12
+PORTREVISION= 1
CATEGORIES= devel
MASTER_SITES= GNU
@@ -30,32 +31,30 @@ CFLAGS:= ${CFLAGS:C/ +$//} # blanks at EOL creep in sometimes
CFLAGS+= -DRL_NO_COMPAT -Wno-unused-function -Wno-unused-variable
EXCLUDE= dejagnu expect sim texinfo intl
EXTRACT_AFTER_ARGS= ${EXCLUDE:S/^/--exclude /}
+EXTRA_PATCHES= ${FILESDIR}/commit-387360daf9 \
+ ${FILESDIR}/commit-b268007c68
LIB_DEPENDS+= libexpat.so:textproc/expat2
VER= ${PORTVERSION:S/.//g}
PLIST_SUB= VER=${VER}
-ONLY_FOR_ARCHS= i386 amd64 powerpc powerpc64 armv6 # untested elsewhere, might work
+ONLY_FOR_ARCHS= i386 amd64 powerpc powerpc64 armv6 mips # untested elsewhere, might work
OPTIONS_DEFINE= DEBUG GDB_LINK GUILE KGDB PYTHON TUI
OPTIONS_DEFAULT= GDB_LINK KGDB PYTHON TUI PORT_READLINE
OPTIONS_SINGLE= READLINE
-OPTIONS_SINGLE_READLINE= BASE_READLINE BUNDLED_READLINE PORT_READLINE
+OPTIONS_SINGLE_READLINE= BUNDLED_READLINE PORT_READLINE
GDB_LINK_DESC= Create ${PREFIX}/bin/gdb symlink
KGDB_DESC= Kernel Debugging Support
-BASE_READLINE_DESC= from base system
BUNDLED_READLINE_DESC= from gdb distfile
PORT_READLINE_DESC= from devel/readline port
TUI_DESC= Text User Interface enabled
OPTIONS_SUB= yes
-BASE_READLINE_USES= readline
-BASE_READLINE_CFLAGS= -D_rl_echoing_p=readline_echoing_p
-BASE_READLINE_EXTRA_PATCHES= ${FILESDIR}/extrapatch-base-readline
BUNDLED_READLINE_CONFIGURE_OFF= --with-system-readline
DEBUG_CFLAGS= -g
GUILE_CONFIGURE_WITH= guile
@@ -69,9 +68,6 @@ TUI_CONFIGURE_ENABLE= tui
.include <bsd.port.options.mk>
-# The option -Wno-extended-offsetof is supported by clang only
-CFLAGS+= -Wno-extended-offsetof
-
.if ! ${PORT_OPTIONS:MBUNDLED_READLINE}
EXCLUDE+= readline
.endif
@@ -80,6 +76,10 @@ EXCLUDE+= readline
CONFIGURE_TARGET= x86_64-portbld-freebsd${OSREL}
.endif
+.if ${ARCH} != "mips"
+CFLAGS+= -Wno-extended-offsetof
+.endif
+
post-patch:
@${REINPLACE_CMD} -e 's|$$| [GDB v${PORTVERSION} for FreeBSD]|' \
${WRKSRC}/gdb/version.in
diff --git a/devel/gdb/distinfo b/devel/gdb/distinfo
index f01acb399aed..e59bc52bb3f9 100644
--- a/devel/gdb/distinfo
+++ b/devel/gdb/distinfo
@@ -1,3 +1,3 @@
-TIMESTAMP = 1480413713
+TIMESTAMP = 1483525133
SHA256 (gdb-7.12.tar.xz) = 834ff3c5948b30718343ea57b11cbc3235d7995c6a4f3a5cecec8c8114164f94
SIZE (gdb-7.12.tar.xz) = 19219556
diff --git a/devel/gdb/files/commit-387360daf9 b/devel/gdb/files/commit-387360daf9
new file mode 100644
index 000000000000..e0a03ad2d786
--- /dev/null
+++ b/devel/gdb/files/commit-387360daf9
@@ -0,0 +1,1360 @@
+commit 9978d70207d8a6bc7ff3c570814053c68e78b913
+Author: John Baldwin <jhb@FreeBSD.org>
+Date: Wed Jan 4 09:41:58 2017 -0800
+
+ Add FreeBSD/mips architecture.
+
+ This has been tested for the n64 and o32 ABIs. Signal frame unwinders for
+ both ABIs are provided. FreeBSD/mips requires custom linkmap offsets since
+ it contains an additional l_off member in 'struct link_map' that other
+ FreeBSD platforms do not have. Support for collecting and supplying
+ general purpose and floating point register sets are provided. Common
+ routines for working with native format register sets are exported for
+ use by the native target.
+
+ gdb/ChangeLog:
+
+ * Makefile.in (ALL_TARGET_OBS): Add mips-fbsd-tdep.o.
+ (ALLDEPFILES): Add mips-fbsd-tdep.c.
+ * NEWS: Mention new FreeBSD/mips target.
+ * configure.tgt: Add mips*-*-freebsd*.
+ * mips-fbsd-tdep.c: New file.
+ * mips-fbsd-tdep.h: New file.
+
+ gdb/doc/ChangeLog:
+
+ * gdb.texinfo (Contributors): Add SRI International and University
+ of Cambridge for FreeBSD/mips.
+
+diff --git gdb/Makefile.in gdb/Makefile.in
+index 7b2df86878..300c2cb702 100644
+--- gdb/Makefile.in
++++ gdb/Makefile.in
+@@ -685,6 +685,7 @@ ALL_TARGET_OBS = \
+ m88k-tdep.o \
+ mep-tdep.o \
+ microblaze-tdep.o microblaze-linux-tdep.o \
++ mips-fbsd-tdep.o \
+ mips-linux-tdep.o mips-sde-tdep.o \
+ mipsnbsd-tdep.o mips-tdep.o \
+ mn10300-linux-tdep.o mn10300-tdep.o \
+@@ -1724,6 +1725,7 @@ ALLDEPFILES = \
+ m88k-tdep.c m88kbsd-nat.c \
+ microblaze-tdep.c microblaze-linux-tdep.c \
+ mingw-hdep.c common/mingw-strerror.c \
++ mips-fbsd-tdep.c \
+ mips-linux-nat.c mips-linux-tdep.c \
+ mips-sde-tdep.c \
+ mips-tdep.c \
+diff --git gdb/configure.tgt gdb/configure.tgt
+index 7f1aac3742..9ee9f7a799 100644
+--- gdb/configure.tgt
++++ gdb/configure.tgt
+@@ -358,6 +358,11 @@ mips*-*-netbsd* | mips*-*-knetbsd*-gnu)
+ gdb_target_obs="mips-tdep.o mipsnbsd-tdep.o solib-svr4.o nbsd-tdep.o"
+ gdb_sim=../sim/mips/libsim.a
+ ;;
++mips*-*-freebsd*)
++ # Target: MIPS running FreeBSD
++ gdb_target_obs="mips-tdep.o mips-fbsd-tdep.o solib-svr4.o fbsd-tdep.o"
++ gdb_sim=../sim/mips/libsim.a
++ ;;
+ mips64*-*-openbsd*)
+ # Target: OpenBSD/mips64
+ gdb_target_obs="mips-tdep.o mips64obsd-tdep.o obsd-tdep.o solib-svr4.o"
+diff --git gdb/doc/gdb.texinfo gdb/doc/gdb.texinfo
+index 067a45b2de..179da5cdb3 100644
+--- gdb/doc/gdb.texinfo
++++ gdb/doc/gdb.texinfo
+@@ -541,6 +541,11 @@ Steve Tjiang, John Newlin, and Scott Foehner.
+ Michael Eager and staff of Xilinx, Inc., contributed support for the
+ Xilinx MicroBlaze architecture.
+
++Initial support for the FreeBSD/mips target and native configuration
++was developed by SRI International and the University of Cambridge
++Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
++("CTSRD"), as part of the DARPA CRASH research programme.
++
+ @node Sample Session
+ @chapter A Sample @value{GDBN} Session
+
+diff --git gdb/mips-fbsd-tdep.c gdb/mips-fbsd-tdep.c
+new file mode 100644
+index 0000000000..733534ddac
+--- /dev/null
++++ gdb/mips-fbsd-tdep.c
+@@ -0,0 +1,560 @@
++/* Target-dependent code for FreeBSD/mips.
++
++ Copyright (C) 2017 Free Software Foundation, Inc.
++
++ This file is part of GDB.
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 3 of the License, or
++ (at your option) any later version.
++
++ This program is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with this program. If not, see <http://www.gnu.org/licenses/>. */
++
++#include "defs.h"
++#include "osabi.h"
++#include "regset.h"
++#include "trad-frame.h"
++#include "tramp-frame.h"
++
++#include "fbsd-tdep.h"
++#include "mips-tdep.h"
++#include "mips-fbsd-tdep.h"
++
++#include "solib-svr4.h"
++
++/* Shorthand for some register numbers used below. */
++#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
++#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
++#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
++
++/* Core file support. */
++
++/* Number of registers in `struct reg' from <machine/reg.h>. The
++ first 38 follow the standard MIPS layout. The 39th holds
++ IC_INT_REG on RM7K and RM9K processors. The 40th is a dummy for
++ padding. */
++#define MIPS_FBSD_NUM_GREGS 40
++
++/* Number of registers in `struct fpreg' from <machine/reg.h>. The
++ first 32 hold floating point registers. 33 holds the FSR. The
++ 34th is a dummy for padding. */
++#define MIPS_FBSD_NUM_FPREGS 34
++
++/* Supply a single register. If the source register size matches the
++ size the regcache expects, this can use regcache_raw_supply(). If
++ they are different, this copies the source register into a buffer
++ that can be passed to regcache_raw_supply(). */
++
++static void
++mips_fbsd_supply_reg (struct regcache *regcache, int regnum, const void *addr,
++ size_t len)
++{
++ struct gdbarch *gdbarch = get_regcache_arch (regcache);
++
++ if (register_size (gdbarch, regnum) == len)
++ regcache_raw_supply (regcache, regnum, addr);
++ else
++ {
++ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
++ gdb_byte buf[MAX_REGISTER_SIZE];
++ LONGEST val;
++
++ val = extract_signed_integer ((const gdb_byte *) addr, len, byte_order);
++ store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
++ val);
++ regcache_raw_supply (regcache, regnum, buf);
++ }
++}
++
++/* Collect a single register. If the destination register size
++ matches the size the regcache expects, this can use
++ regcache_raw_supply(). If they are different, this fetches the
++ register via regcache_raw_supply() into a buffer and then copies it
++ into the final destination. */
++
++static void
++mips_fbsd_collect_reg (const struct regcache *regcache, int regnum, void *addr,
++ size_t len)
++{
++ struct gdbarch *gdbarch = get_regcache_arch (regcache);
++
++ if (register_size (gdbarch, regnum) == len)
++ regcache_raw_collect (regcache, regnum, addr);
++ else
++ {
++ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
++ gdb_byte buf[MAX_REGISTER_SIZE];
++ LONGEST val;
++
++ regcache_raw_collect (regcache, regnum, buf);
++ val = extract_signed_integer (buf, register_size (gdbarch, regnum),
++ byte_order);
++ store_signed_integer ((gdb_byte *) addr, len, byte_order, val);
++ }
++}
++
++/* Supply the floating-point registers stored in FPREGS to REGCACHE.
++ Each floating-point register in FPREGS is REGSIZE bytes in
++ length. */
++
++void
++mips_fbsd_supply_fpregs (struct regcache *regcache, int regnum,
++ const void *fpregs, size_t regsize)
++{
++ const gdb_byte *regs = (const gdb_byte *) fpregs;
++ int i;
++
++ for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
++ if (regnum == i || regnum == -1)
++ mips_fbsd_supply_reg (regcache, i,
++ regs + (i - MIPS_FP0_REGNUM) * regsize, regsize);
++}
++
++/* Supply the general-purpose registers stored in GREGS to REGCACHE.
++ Each general-purpose register in GREGS is REGSIZE bytes in
++ length. */
++
++void
++mips_fbsd_supply_gregs (struct regcache *regcache, int regnum,
++ const void *gregs, size_t regsize)
++{
++ const gdb_byte *regs = (const gdb_byte *) gregs;
++ int i;
++
++ for (i = 0; i <= MIPS_PC_REGNUM; i++)
++ if (regnum == i || regnum == -1)
++ mips_fbsd_supply_reg (regcache, i, regs + i * regsize, regsize);
++}
++
++/* Collect the floating-point registers from REGCACHE and store them
++ in FPREGS. Each floating-point register in FPREGS is REGSIZE bytes
++ in length. */
++
++void
++mips_fbsd_collect_fpregs (const struct regcache *regcache, int regnum,
++ void *fpregs, size_t regsize)
++{
++ gdb_byte *regs = (gdb_byte *) fpregs;
++ int i;
++
++ for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
++ if (regnum == i || regnum == -1)
++ mips_fbsd_collect_reg (regcache, i,
++ regs + (i - MIPS_FP0_REGNUM) * regsize, regsize);
++}
++
++/* Collect the general-purpose registers from REGCACHE and store them
++ in GREGS. Each general-purpose register in GREGS is REGSIZE bytes
++ in length. */
++
++void
++mips_fbsd_collect_gregs (const struct regcache *regcache, int regnum,
++ void *gregs, size_t regsize)
++{
++ gdb_byte *regs = (gdb_byte *) gregs;
++ int i;
++
++ for (i = 0; i <= MIPS_PC_REGNUM; i++)
++ if (regnum == i || regnum == -1)
++ mips_fbsd_collect_reg (regcache, i, regs + i * regsize, regsize);
++}
++
++/* Supply register REGNUM from the buffer specified by FPREGS and LEN
++ in the floating-point register set REGSET to register cache
++ REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
++
++static void
++mips_fbsd_supply_fpregset (const struct regset *regset,
++ struct regcache *regcache,
++ int regnum, const void *fpregs, size_t len)
++{
++ size_t regsize = mips_abi_regsize (get_regcache_arch (regcache));
++
++ gdb_assert (len >= MIPS_FBSD_NUM_FPREGS * regsize);
++
++ mips_fbsd_supply_fpregs (regcache, regnum, fpregs, regsize);
++}
++
++/* Collect register REGNUM from the register cache REGCACHE and store
++ it in the buffer specified by FPREGS and LEN in the floating-point
++ register set REGSET. If REGNUM is -1, do this for all registers in
++ REGSET. */
++
++static void
++mips_fbsd_collect_fpregset (const struct regset *regset,
++ const struct regcache *regcache,
++ int regnum, void *fpregs, size_t len)
++{
++ size_t regsize = mips_abi_regsize (get_regcache_arch (regcache));
++
++ gdb_assert (len >= MIPS_FBSD_NUM_FPREGS * regsize);
++
++ mips_fbsd_collect_fpregs (regcache, regnum, fpregs, regsize);
++}
++
++/* Supply register REGNUM from the buffer specified by GREGS and LEN
++ in the general-purpose register set REGSET to register cache
++ REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
++
++static void
++mips_fbsd_supply_gregset (const struct regset *regset,
++ struct regcache *regcache, int regnum,
++ const void *gregs, size_t len)
++{
++ size_t regsize = mips_abi_regsize (get_regcache_arch (regcache));
++
++ gdb_assert (len >= MIPS_FBSD_NUM_GREGS * regsize);
++
++ mips_fbsd_supply_gregs (regcache, regnum, gregs, regsize);
++}
++
++/* Collect register REGNUM from the register cache REGCACHE and store
++ it in the buffer specified by GREGS and LEN in the general-purpose
++ register set REGSET. If REGNUM is -1, do this for all registers in
++ REGSET. */
++
++static void
++mips_fbsd_collect_gregset (const struct regset *regset,
++ const struct regcache *regcache,
++ int regnum, void *gregs, size_t len)
++{
++ size_t regsize = mips_abi_regsize (get_regcache_arch (regcache));
++
++ gdb_assert (len >= MIPS_FBSD_NUM_GREGS * regsize);
++
++ mips_fbsd_collect_gregs (regcache, regnum, gregs, regsize);
++}
++
++/* FreeBSD/mips register sets. */
++
++static const struct regset mips_fbsd_gregset =
++{
++ NULL,
++ mips_fbsd_supply_gregset,
++ mips_fbsd_collect_gregset,
++};
++
++static const struct regset mips_fbsd_fpregset =
++{
++ NULL,
++ mips_fbsd_supply_fpregset,
++ mips_fbsd_collect_fpregset,
++};
++
++/* Iterate over core file register note sections. */
++
++static void
++mips_fbsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
++ iterate_over_regset_sections_cb *cb,
++ void *cb_data,
++ const struct regcache *regcache)
++{
++ size_t regsize = mips_abi_regsize (gdbarch);
++
++ cb (".reg", MIPS_FBSD_NUM_GREGS * regsize, &mips_fbsd_gregset,
++ NULL, cb_data);
++ cb (".reg2", MIPS_FBSD_NUM_FPREGS * regsize, &mips_fbsd_fpregset,
++ NULL, cb_data);
++}
++
++/* Signal trampoline support. */
++
++#define FBSD_SYS_sigreturn 417
++
++#define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + FBSD_SYS_sigreturn
++#define MIPS_INST_SYSCALL 0x0000000c
++#define MIPS_INST_BREAK 0x0000000d
++
++#define O32_SIGFRAME_UCONTEXT_OFFSET (16)
++#define O32_SIGSET_T_SIZE (16)
++
++#define O32_UCONTEXT_ONSTACK (O32_SIGSET_T_SIZE)
++#define O32_UCONTEXT_PC (O32_UCONTEXT_ONSTACK + 4)
++#define O32_UCONTEXT_REGS (O32_UCONTEXT_PC + 4)
++#define O32_UCONTEXT_SR (O32_UCONTEXT_REGS + 4 * 32)
++#define O32_UCONTEXT_LO (O32_UCONTEXT_SR + 4)
++#define O32_UCONTEXT_HI (O32_UCONTEXT_LO + 4)
++#define O32_UCONTEXT_FPUSED (O32_UCONTEXT_HI + 4)
++#define O32_UCONTEXT_FPREGS (O32_UCONTEXT_FPUSED + 4)
++
++#define O32_UCONTEXT_REG_SIZE 4
++
++static void
++mips_fbsd_sigframe_init (const struct tramp_frame *self,
++ struct frame_info *this_frame,
++ struct trad_frame_cache *cache,
++ CORE_ADDR func)
++{
++ struct gdbarch *gdbarch = get_frame_arch (this_frame);
++ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
++ CORE_ADDR sp, ucontext_addr, addr;
++ int regnum;
++ gdb_byte buf[4];
++
++ /* We find the appropriate instance of `ucontext_t' at a
++ fixed offset in the signal frame. */
++ sp = get_frame_register_signed (this_frame,
++ MIPS_SP_REGNUM + gdbarch_num_regs (gdbarch));
++ ucontext_addr = sp + O32_SIGFRAME_UCONTEXT_OFFSET;
++
++ /* PC. */
++ regnum = mips_regnum (gdbarch)->pc;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + O32_UCONTEXT_PC);
++
++ /* GPRs. */
++ for (regnum = MIPS_ZERO_REGNUM, addr = ucontext_addr + O32_UCONTEXT_REGS;
++ regnum <= MIPS_RA_REGNUM; regnum++, addr += O32_UCONTEXT_REG_SIZE)
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ addr);
++
++ regnum = MIPS_PS_REGNUM;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + O32_UCONTEXT_SR);
++
++ /* HI and LO. */
++ regnum = mips_regnum (gdbarch)->lo;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + O32_UCONTEXT_LO);
++ regnum = mips_regnum (gdbarch)->hi;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + O32_UCONTEXT_HI);
++
++ if (target_read_memory (ucontext_addr + O32_UCONTEXT_FPUSED, buf, 4) == 0 &&
++ extract_unsigned_integer (buf, 4, byte_order) != 0)
++ {
++ for (regnum = 0, addr = ucontext_addr + O32_UCONTEXT_FPREGS;
++ regnum < 32; regnum++, addr += O32_UCONTEXT_REG_SIZE)
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_fp0_regnum (gdbarch),
++ addr);
++ trad_frame_set_reg_addr (cache, mips_regnum (gdbarch)->fp_control_status,
++ addr);
++ }
++
++ trad_frame_set_id (cache, frame_id_build (sp, func));
++}
++
++#define MIPS_INST_ADDIU_A0_SP_O32 (0x27a40000 \
++ + O32_SIGFRAME_UCONTEXT_OFFSET)
++
++static const struct tramp_frame mips_fbsd_sigframe =
++{
++ SIGTRAMP_FRAME,
++ MIPS_INSN32_SIZE,
++ {
++ { MIPS_INST_ADDIU_A0_SP_O32, -1 }, /* addiu a0, sp, SIGF_UC */
++ { MIPS_INST_LI_V0_SIGRETURN, -1 }, /* li v0, SYS_sigreturn */
++ { MIPS_INST_SYSCALL, -1 }, /* syscall */
++ { MIPS_INST_BREAK, -1 }, /* break */
++ { TRAMP_SENTINEL_INSN, -1 }
++ },
++ mips_fbsd_sigframe_init
++};
++
++#define N64_SIGFRAME_UCONTEXT_OFFSET (32)
++#define N64_SIGSET_T_SIZE (16)
++
++#define N64_UCONTEXT_ONSTACK (N64_SIGSET_T_SIZE)
++#define N64_UCONTEXT_PC (N64_UCONTEXT_ONSTACK + 8)
++#define N64_UCONTEXT_REGS (N64_UCONTEXT_PC + 8)
++#define N64_UCONTEXT_SR (N64_UCONTEXT_REGS + 8 * 32)
++#define N64_UCONTEXT_LO (N64_UCONTEXT_SR + 8)
++#define N64_UCONTEXT_HI (N64_UCONTEXT_LO + 8)
++#define N64_UCONTEXT_FPUSED (N64_UCONTEXT_HI + 8)
++#define N64_UCONTEXT_FPREGS (N64_UCONTEXT_FPUSED + 8)
++
++#define N64_UCONTEXT_REG_SIZE 8
++
++static void
++mips64_fbsd_sigframe_init (const struct tramp_frame *self,
++ struct frame_info *this_frame,
++ struct trad_frame_cache *cache,
++ CORE_ADDR func)
++{
++ struct gdbarch *gdbarch = get_frame_arch (this_frame);
++ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
++ CORE_ADDR sp, ucontext_addr, addr;
++ int regnum;
++ gdb_byte buf[4];
++
++ /* We find the appropriate instance of `ucontext_t' at a
++ fixed offset in the signal frame. */
++ sp = get_frame_register_signed (this_frame,
++ MIPS_SP_REGNUM + gdbarch_num_regs (gdbarch));
++ ucontext_addr = sp + N64_SIGFRAME_UCONTEXT_OFFSET;
++
++ /* PC. */
++ regnum = mips_regnum (gdbarch)->pc;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + N64_UCONTEXT_PC);
++
++ /* GPRs. */
++ for (regnum = MIPS_ZERO_REGNUM, addr = ucontext_addr + N64_UCONTEXT_REGS;
++ regnum <= MIPS_RA_REGNUM; regnum++, addr += N64_UCONTEXT_REG_SIZE)
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ addr);
++
++ regnum = MIPS_PS_REGNUM;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + N64_UCONTEXT_SR);
++
++ /* HI and LO. */
++ regnum = mips_regnum (gdbarch)->lo;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + N64_UCONTEXT_LO);
++ regnum = mips_regnum (gdbarch)->hi;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + N64_UCONTEXT_HI);
++
++ if (target_read_memory (ucontext_addr + N64_UCONTEXT_FPUSED, buf, 4) == 0 &&
++ extract_unsigned_integer (buf, 4, byte_order) != 0)
++ {
++ for (regnum = 0, addr = ucontext_addr + N64_UCONTEXT_FPREGS;
++ regnum < 32; regnum++, addr += N64_UCONTEXT_REG_SIZE)
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_fp0_regnum (gdbarch),
++ addr);
++ trad_frame_set_reg_addr (cache, mips_regnum (gdbarch)->fp_control_status,
++ addr);
++ }
++
++ trad_frame_set_id (cache, frame_id_build (sp, func));
++}
++
++#define MIPS_INST_DADDIU_A0_SP_N64 (0x67a40000 \
++ + N64_SIGFRAME_UCONTEXT_OFFSET)
++
++static const struct tramp_frame mips64_fbsd_sigframe =
++{
++ SIGTRAMP_FRAME,
++ MIPS_INSN32_SIZE,
++ {
++ { MIPS_INST_DADDIU_A0_SP_N64, -1 }, /* daddiu a0, sp, SIGF_UC */
++ { MIPS_INST_LI_V0_SIGRETURN, -1 }, /* li v0, SYS_sigreturn */
++ { MIPS_INST_SYSCALL, -1 }, /* syscall */
++ { MIPS_INST_BREAK, -1 }, /* break */
++ { TRAMP_SENTINEL_INSN, -1 }
++ },
++ mips64_fbsd_sigframe_init
++};
++
++/* Shared library support. */
++
++/* FreeBSD/mips uses a slightly different `struct link_map' than the
++ other FreeBSD platforms as it includes an additional `l_off'
++ member. */
++
++static struct link_map_offsets *
++mips_fbsd_ilp32_fetch_link_map_offsets (void)
++{
++ static struct link_map_offsets lmo;
++ static struct link_map_offsets *lmp = NULL;
++
++ if (lmp == NULL)
++ {
++ lmp = &lmo;
++
++ lmo.r_version_offset = 0;
++ lmo.r_version_size = 4;
++ lmo.r_map_offset = 4;
++ lmo.r_brk_offset = 8;
++ lmo.r_ldsomap_offset = -1;
++
++ lmo.link_map_size = 24;
++ lmo.l_addr_offset = 0;
++ lmo.l_name_offset = 8;
++ lmo.l_ld_offset = 12;
++ lmo.l_next_offset = 16;
++ lmo.l_prev_offset = 20;
++ }
++
++ return lmp;
++}
++
++static struct link_map_offsets *
++mips_fbsd_lp64_fetch_link_map_offsets (void)
++{
++ static struct link_map_offsets lmo;
++ static struct link_map_offsets *lmp = NULL;
++
++ if (lmp == NULL)
++ {
++ lmp = &lmo;
++
++ lmo.r_version_offset = 0;
++ lmo.r_version_size = 4;
++ lmo.r_map_offset = 8;
++ lmo.r_brk_offset = 16;
++ lmo.r_ldsomap_offset = -1;
++
++ lmo.link_map_size = 48;
++ lmo.l_addr_offset = 0;
++ lmo.l_name_offset = 16;
++ lmo.l_ld_offset = 24;
++ lmo.l_next_offset = 32;
++ lmo.l_prev_offset = 40;
++ }
++
++ return lmp;
++}
++
++static void
++mips_fbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
++{
++ enum mips_abi abi = mips_abi (gdbarch);
++
++ /* Generic FreeBSD support. */
++ fbsd_init_abi (info, gdbarch);
++
++ set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
++
++ switch (abi)
++ {
++ case MIPS_ABI_O32:
++ tramp_frame_prepend_unwinder (gdbarch, &mips_fbsd_sigframe);
++ break;
++ case MIPS_ABI_N32:
++ break;
++ case MIPS_ABI_N64:
++ tramp_frame_prepend_unwinder (gdbarch, &mips64_fbsd_sigframe);
++ break;
++ }
++
++ set_gdbarch_iterate_over_regset_sections
++ (gdbarch, mips_fbsd_iterate_over_regset_sections);
++
++ /* FreeBSD/mips has SVR4-style shared libraries. */
++ set_solib_svr4_fetch_link_map_offsets
++ (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
++ mips_fbsd_ilp32_fetch_link_map_offsets :
++ mips_fbsd_lp64_fetch_link_map_offsets));
++}
++
++
++/* Provide a prototype to silence -Wmissing-prototypes. */
++void _initialize_mips_fbsd_tdep (void);
++
++void
++_initialize_mips_fbsd_tdep (void)
++{
++ gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_FREEBSD_ELF,
++ mips_fbsd_init_abi);
++}
+diff --git gdb/mips-fbsd-tdep.h gdb/mips-fbsd-tdep.h
+new file mode 100644
+index 0000000000..8a197e6325
+--- /dev/null
++++ gdb/mips-fbsd-tdep.h
+@@ -0,0 +1,28 @@
++/* Common target dependent code for GDB on MIPS systems running FreeBSD.
++
++ Copyright (C) 2017 Free Software Foundation, Inc.
++
++ This file is part of GDB.
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 3 of the License, or
++ (at your option) any later version.
++
++ This program is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with this program. If not, see <http://www.gnu.org/licenses/>. */
++
++#ifndef MIPS_FBSD_TDEP_H
++#define MIPS_FBSD_TDEP_H
++
++void mips_fbsd_supply_fpregs (struct regcache *, int, const void *, size_t);
++void mips_fbsd_supply_gregs (struct regcache *, int, const void *, size_t);
++void mips_fbsd_collect_fpregs (const struct regcache *, int, void *, size_t);
++void mips_fbsd_collect_gregs (const struct regcache *, int, void *, size_t);
++
++#endif /* MIPS_FBSD_TDEP_H */
+commit 9978d70207d8a6bc7ff3c570814053c68e78b913
+Author: John Baldwin <jhb@FreeBSD.org>
+Date: Wed Jan 4 09:41:58 2017 -0800
+
+ Add FreeBSD/mips architecture.
+
+ This has been tested for the n64 and o32 ABIs. Signal frame unwinders for
+ both ABIs are provided. FreeBSD/mips requires custom linkmap offsets since
+ it contains an additional l_off member in 'struct link_map' that other
+ FreeBSD platforms do not have. Support for collecting and supplying
+ general purpose and floating point register sets are provided. Common
+ routines for working with native format register sets are exported for
+ use by the native target.
+
+ gdb/ChangeLog:
+
+ * Makefile.in (ALL_TARGET_OBS): Add mips-fbsd-tdep.o.
+ (ALLDEPFILES): Add mips-fbsd-tdep.c.
+ * NEWS: Mention new FreeBSD/mips target.
+ * configure.tgt: Add mips*-*-freebsd*.
+ * mips-fbsd-tdep.c: New file.
+ * mips-fbsd-tdep.h: New file.
+
+ gdb/doc/ChangeLog:
+
+ * gdb.texinfo (Contributors): Add SRI International and University
+ of Cambridge for FreeBSD/mips.
+
+diff --git gdb/Makefile.in gdb/Makefile.in
+index 7b2df86878..300c2cb702 100644
+--- gdb/Makefile.in
++++ gdb/Makefile.in
+@@ -685,6 +685,7 @@ ALL_TARGET_OBS = \
+ m88k-tdep.o \
+ mep-tdep.o \
+ microblaze-tdep.o microblaze-linux-tdep.o \
++ mips-fbsd-tdep.o \
+ mips-linux-tdep.o mips-sde-tdep.o \
+ mipsnbsd-tdep.o mips-tdep.o \
+ mn10300-linux-tdep.o mn10300-tdep.o \
+@@ -1724,6 +1725,7 @@ ALLDEPFILES = \
+ m88k-tdep.c m88kbsd-nat.c \
+ microblaze-tdep.c microblaze-linux-tdep.c \
+ mingw-hdep.c common/mingw-strerror.c \
++ mips-fbsd-tdep.c \
+ mips-linux-nat.c mips-linux-tdep.c \
+ mips-sde-tdep.c \
+ mips-tdep.c \
+diff --git gdb/configure.tgt gdb/configure.tgt
+index 7f1aac3742..9ee9f7a799 100644
+--- gdb/configure.tgt
++++ gdb/configure.tgt
+@@ -358,6 +358,11 @@ mips*-*-netbsd* | mips*-*-knetbsd*-gnu)
+ gdb_target_obs="mips-tdep.o mipsnbsd-tdep.o solib-svr4.o nbsd-tdep.o"
+ gdb_sim=../sim/mips/libsim.a
+ ;;
++mips*-*-freebsd*)
++ # Target: MIPS running FreeBSD
++ gdb_target_obs="mips-tdep.o mips-fbsd-tdep.o solib-svr4.o fbsd-tdep.o"
++ gdb_sim=../sim/mips/libsim.a
++ ;;
+ mips64*-*-openbsd*)
+ # Target: OpenBSD/mips64
+ gdb_target_obs="mips-tdep.o mips64obsd-tdep.o obsd-tdep.o solib-svr4.o"
+diff --git gdb/doc/gdb.texinfo gdb/doc/gdb.texinfo
+index 067a45b2de..179da5cdb3 100644
+--- gdb/doc/gdb.texinfo
++++ gdb/doc/gdb.texinfo
+@@ -541,6 +541,11 @@ Steve Tjiang, John Newlin, and Scott Foehner.
+ Michael Eager and staff of Xilinx, Inc., contributed support for the
+ Xilinx MicroBlaze architecture.
+
++Initial support for the FreeBSD/mips target and native configuration
++was developed by SRI International and the University of Cambridge
++Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
++("CTSRD"), as part of the DARPA CRASH research programme.
++
+ @node Sample Session
+ @chapter A Sample @value{GDBN} Session
+
+diff --git gdb/mips-fbsd-tdep.c gdb/mips-fbsd-tdep.c
+new file mode 100644
+index 0000000000..733534ddac
+--- /dev/null
++++ gdb/mips-fbsd-tdep.c
+@@ -0,0 +1,560 @@
++/* Target-dependent code for FreeBSD/mips.
++
++ Copyright (C) 2017 Free Software Foundation, Inc.
++
++ This file is part of GDB.
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 3 of the License, or
++ (at your option) any later version.
++
++ This program is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with this program. If not, see <http://www.gnu.org/licenses/>. */
++
++#include "defs.h"
++#include "osabi.h"
++#include "regset.h"
++#include "trad-frame.h"
++#include "tramp-frame.h"
++
++#include "fbsd-tdep.h"
++#include "mips-tdep.h"
++#include "mips-fbsd-tdep.h"
++
++#include "solib-svr4.h"
++
++/* Shorthand for some register numbers used below. */
++#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
++#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
++#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
++
++/* Core file support. */
++
++/* Number of registers in `struct reg' from <machine/reg.h>. The
++ first 38 follow the standard MIPS layout. The 39th holds
++ IC_INT_REG on RM7K and RM9K processors. The 40th is a dummy for
++ padding. */
++#define MIPS_FBSD_NUM_GREGS 40
++
++/* Number of registers in `struct fpreg' from <machine/reg.h>. The
++ first 32 hold floating point registers. 33 holds the FSR. The
++ 34th is a dummy for padding. */
++#define MIPS_FBSD_NUM_FPREGS 34
++
++/* Supply a single register. If the source register size matches the
++ size the regcache expects, this can use regcache_raw_supply(). If
++ they are different, this copies the source register into a buffer
++ that can be passed to regcache_raw_supply(). */
++
++static void
++mips_fbsd_supply_reg (struct regcache *regcache, int regnum, const void *addr,
++ size_t len)
++{
++ struct gdbarch *gdbarch = get_regcache_arch (regcache);
++
++ if (register_size (gdbarch, regnum) == len)
++ regcache_raw_supply (regcache, regnum, addr);
++ else
++ {
++ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
++ gdb_byte buf[MAX_REGISTER_SIZE];
++ LONGEST val;
++
++ val = extract_signed_integer ((const gdb_byte *) addr, len, byte_order);
++ store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
++ val);
++ regcache_raw_supply (regcache, regnum, buf);
++ }
++}
++
++/* Collect a single register. If the destination register size
++ matches the size the regcache expects, this can use
++ regcache_raw_supply(). If they are different, this fetches the
++ register via regcache_raw_supply() into a buffer and then copies it
++ into the final destination. */
++
++static void
++mips_fbsd_collect_reg (const struct regcache *regcache, int regnum, void *addr,
++ size_t len)
++{
++ struct gdbarch *gdbarch = get_regcache_arch (regcache);
++
++ if (register_size (gdbarch, regnum) == len)
++ regcache_raw_collect (regcache, regnum, addr);
++ else
++ {
++ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
++ gdb_byte buf[MAX_REGISTER_SIZE];
++ LONGEST val;
++
++ regcache_raw_collect (regcache, regnum, buf);
++ val = extract_signed_integer (buf, register_size (gdbarch, regnum),
++ byte_order);
++ store_signed_integer ((gdb_byte *) addr, len, byte_order, val);
++ }
++}
++
++/* Supply the floating-point registers stored in FPREGS to REGCACHE.
++ Each floating-point register in FPREGS is REGSIZE bytes in
++ length. */
++
++void
++mips_fbsd_supply_fpregs (struct regcache *regcache, int regnum,
++ const void *fpregs, size_t regsize)
++{
++ const gdb_byte *regs = (const gdb_byte *) fpregs;
++ int i;
++
++ for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
++ if (regnum == i || regnum == -1)
++ mips_fbsd_supply_reg (regcache, i,
++ regs + (i - MIPS_FP0_REGNUM) * regsize, regsize);
++}
++
++/* Supply the general-purpose registers stored in GREGS to REGCACHE.
++ Each general-purpose register in GREGS is REGSIZE bytes in
++ length. */
++
++void
++mips_fbsd_supply_gregs (struct regcache *regcache, int regnum,
++ const void *gregs, size_t regsize)
++{
++ const gdb_byte *regs = (const gdb_byte *) gregs;
++ int i;
++
++ for (i = 0; i <= MIPS_PC_REGNUM; i++)
++ if (regnum == i || regnum == -1)
++ mips_fbsd_supply_reg (regcache, i, regs + i * regsize, regsize);
++}
++
++/* Collect the floating-point registers from REGCACHE and store them
++ in FPREGS. Each floating-point register in FPREGS is REGSIZE bytes
++ in length. */
++
++void
++mips_fbsd_collect_fpregs (const struct regcache *regcache, int regnum,
++ void *fpregs, size_t regsize)
++{
++ gdb_byte *regs = (gdb_byte *) fpregs;
++ int i;
++
++ for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
++ if (regnum == i || regnum == -1)
++ mips_fbsd_collect_reg (regcache, i,
++ regs + (i - MIPS_FP0_REGNUM) * regsize, regsize);
++}
++
++/* Collect the general-purpose registers from REGCACHE and store them
++ in GREGS. Each general-purpose register in GREGS is REGSIZE bytes
++ in length. */
++
++void
++mips_fbsd_collect_gregs (const struct regcache *regcache, int regnum,
++ void *gregs, size_t regsize)
++{
++ gdb_byte *regs = (gdb_byte *) gregs;
++ int i;
++
++ for (i = 0; i <= MIPS_PC_REGNUM; i++)
++ if (regnum == i || regnum == -1)
++ mips_fbsd_collect_reg (regcache, i, regs + i * regsize, regsize);
++}
++
++/* Supply register REGNUM from the buffer specified by FPREGS and LEN
++ in the floating-point register set REGSET to register cache
++ REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
++
++static void
++mips_fbsd_supply_fpregset (const struct regset *regset,
++ struct regcache *regcache,
++ int regnum, const void *fpregs, size_t len)
++{
++ size_t regsize = mips_abi_regsize (get_regcache_arch (regcache));
++
++ gdb_assert (len >= MIPS_FBSD_NUM_FPREGS * regsize);
++
++ mips_fbsd_supply_fpregs (regcache, regnum, fpregs, regsize);
++}
++
++/* Collect register REGNUM from the register cache REGCACHE and store
++ it in the buffer specified by FPREGS and LEN in the floating-point
++ register set REGSET. If REGNUM is -1, do this for all registers in
++ REGSET. */
++
++static void
++mips_fbsd_collect_fpregset (const struct regset *regset,
++ const struct regcache *regcache,
++ int regnum, void *fpregs, size_t len)
++{
++ size_t regsize = mips_abi_regsize (get_regcache_arch (regcache));
++
++ gdb_assert (len >= MIPS_FBSD_NUM_FPREGS * regsize);
++
++ mips_fbsd_collect_fpregs (regcache, regnum, fpregs, regsize);
++}
++
++/* Supply register REGNUM from the buffer specified by GREGS and LEN
++ in the general-purpose register set REGSET to register cache
++ REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
++
++static void
++mips_fbsd_supply_gregset (const struct regset *regset,
++ struct regcache *regcache, int regnum,
++ const void *gregs, size_t len)
++{
++ size_t regsize = mips_abi_regsize (get_regcache_arch (regcache));
++
++ gdb_assert (len >= MIPS_FBSD_NUM_GREGS * regsize);
++
++ mips_fbsd_supply_gregs (regcache, regnum, gregs, regsize);
++}
++
++/* Collect register REGNUM from the register cache REGCACHE and store
++ it in the buffer specified by GREGS and LEN in the general-purpose
++ register set REGSET. If REGNUM is -1, do this for all registers in
++ REGSET. */
++
++static void
++mips_fbsd_collect_gregset (const struct regset *regset,
++ const struct regcache *regcache,
++ int regnum, void *gregs, size_t len)
++{
++ size_t regsize = mips_abi_regsize (get_regcache_arch (regcache));
++
++ gdb_assert (len >= MIPS_FBSD_NUM_GREGS * regsize);
++
++ mips_fbsd_collect_gregs (regcache, regnum, gregs, regsize);
++}
++
++/* FreeBSD/mips register sets. */
++
++static const struct regset mips_fbsd_gregset =
++{
++ NULL,
++ mips_fbsd_supply_gregset,
++ mips_fbsd_collect_gregset,
++};
++
++static const struct regset mips_fbsd_fpregset =
++{
++ NULL,
++ mips_fbsd_supply_fpregset,
++ mips_fbsd_collect_fpregset,
++};
++
++/* Iterate over core file register note sections. */
++
++static void
++mips_fbsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
++ iterate_over_regset_sections_cb *cb,
++ void *cb_data,
++ const struct regcache *regcache)
++{
++ size_t regsize = mips_abi_regsize (gdbarch);
++
++ cb (".reg", MIPS_FBSD_NUM_GREGS * regsize, &mips_fbsd_gregset,
++ NULL, cb_data);
++ cb (".reg2", MIPS_FBSD_NUM_FPREGS * regsize, &mips_fbsd_fpregset,
++ NULL, cb_data);
++}
++
++/* Signal trampoline support. */
++
++#define FBSD_SYS_sigreturn 417
++
++#define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + FBSD_SYS_sigreturn
++#define MIPS_INST_SYSCALL 0x0000000c
++#define MIPS_INST_BREAK 0x0000000d
++
++#define O32_SIGFRAME_UCONTEXT_OFFSET (16)
++#define O32_SIGSET_T_SIZE (16)
++
++#define O32_UCONTEXT_ONSTACK (O32_SIGSET_T_SIZE)
++#define O32_UCONTEXT_PC (O32_UCONTEXT_ONSTACK + 4)
++#define O32_UCONTEXT_REGS (O32_UCONTEXT_PC + 4)
++#define O32_UCONTEXT_SR (O32_UCONTEXT_REGS + 4 * 32)
++#define O32_UCONTEXT_LO (O32_UCONTEXT_SR + 4)
++#define O32_UCONTEXT_HI (O32_UCONTEXT_LO + 4)
++#define O32_UCONTEXT_FPUSED (O32_UCONTEXT_HI + 4)
++#define O32_UCONTEXT_FPREGS (O32_UCONTEXT_FPUSED + 4)
++
++#define O32_UCONTEXT_REG_SIZE 4
++
++static void
++mips_fbsd_sigframe_init (const struct tramp_frame *self,
++ struct frame_info *this_frame,
++ struct trad_frame_cache *cache,
++ CORE_ADDR func)
++{
++ struct gdbarch *gdbarch = get_frame_arch (this_frame);
++ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
++ CORE_ADDR sp, ucontext_addr, addr;
++ int regnum;
++ gdb_byte buf[4];
++
++ /* We find the appropriate instance of `ucontext_t' at a
++ fixed offset in the signal frame. */
++ sp = get_frame_register_signed (this_frame,
++ MIPS_SP_REGNUM + gdbarch_num_regs (gdbarch));
++ ucontext_addr = sp + O32_SIGFRAME_UCONTEXT_OFFSET;
++
++ /* PC. */
++ regnum = mips_regnum (gdbarch)->pc;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + O32_UCONTEXT_PC);
++
++ /* GPRs. */
++ for (regnum = MIPS_ZERO_REGNUM, addr = ucontext_addr + O32_UCONTEXT_REGS;
++ regnum <= MIPS_RA_REGNUM; regnum++, addr += O32_UCONTEXT_REG_SIZE)
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ addr);
++
++ regnum = MIPS_PS_REGNUM;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + O32_UCONTEXT_SR);
++
++ /* HI and LO. */
++ regnum = mips_regnum (gdbarch)->lo;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + O32_UCONTEXT_LO);
++ regnum = mips_regnum (gdbarch)->hi;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + O32_UCONTEXT_HI);
++
++ if (target_read_memory (ucontext_addr + O32_UCONTEXT_FPUSED, buf, 4) == 0 &&
++ extract_unsigned_integer (buf, 4, byte_order) != 0)
++ {
++ for (regnum = 0, addr = ucontext_addr + O32_UCONTEXT_FPREGS;
++ regnum < 32; regnum++, addr += O32_UCONTEXT_REG_SIZE)
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_fp0_regnum (gdbarch),
++ addr);
++ trad_frame_set_reg_addr (cache, mips_regnum (gdbarch)->fp_control_status,
++ addr);
++ }
++
++ trad_frame_set_id (cache, frame_id_build (sp, func));
++}
++
++#define MIPS_INST_ADDIU_A0_SP_O32 (0x27a40000 \
++ + O32_SIGFRAME_UCONTEXT_OFFSET)
++
++static const struct tramp_frame mips_fbsd_sigframe =
++{
++ SIGTRAMP_FRAME,
++ MIPS_INSN32_SIZE,
++ {
++ { MIPS_INST_ADDIU_A0_SP_O32, -1 }, /* addiu a0, sp, SIGF_UC */
++ { MIPS_INST_LI_V0_SIGRETURN, -1 }, /* li v0, SYS_sigreturn */
++ { MIPS_INST_SYSCALL, -1 }, /* syscall */
++ { MIPS_INST_BREAK, -1 }, /* break */
++ { TRAMP_SENTINEL_INSN, -1 }
++ },
++ mips_fbsd_sigframe_init
++};
++
++#define N64_SIGFRAME_UCONTEXT_OFFSET (32)
++#define N64_SIGSET_T_SIZE (16)
++
++#define N64_UCONTEXT_ONSTACK (N64_SIGSET_T_SIZE)
++#define N64_UCONTEXT_PC (N64_UCONTEXT_ONSTACK + 8)
++#define N64_UCONTEXT_REGS (N64_UCONTEXT_PC + 8)
++#define N64_UCONTEXT_SR (N64_UCONTEXT_REGS + 8 * 32)
++#define N64_UCONTEXT_LO (N64_UCONTEXT_SR + 8)
++#define N64_UCONTEXT_HI (N64_UCONTEXT_LO + 8)
++#define N64_UCONTEXT_FPUSED (N64_UCONTEXT_HI + 8)
++#define N64_UCONTEXT_FPREGS (N64_UCONTEXT_FPUSED + 8)
++
++#define N64_UCONTEXT_REG_SIZE 8
++
++static void
++mips64_fbsd_sigframe_init (const struct tramp_frame *self,
++ struct frame_info *this_frame,
++ struct trad_frame_cache *cache,
++ CORE_ADDR func)
++{
++ struct gdbarch *gdbarch = get_frame_arch (this_frame);
++ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
++ CORE_ADDR sp, ucontext_addr, addr;
++ int regnum;
++ gdb_byte buf[4];
++
++ /* We find the appropriate instance of `ucontext_t' at a
++ fixed offset in the signal frame. */
++ sp = get_frame_register_signed (this_frame,
++ MIPS_SP_REGNUM + gdbarch_num_regs (gdbarch));
++ ucontext_addr = sp + N64_SIGFRAME_UCONTEXT_OFFSET;
++
++ /* PC. */
++ regnum = mips_regnum (gdbarch)->pc;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + N64_UCONTEXT_PC);
++
++ /* GPRs. */
++ for (regnum = MIPS_ZERO_REGNUM, addr = ucontext_addr + N64_UCONTEXT_REGS;
++ regnum <= MIPS_RA_REGNUM; regnum++, addr += N64_UCONTEXT_REG_SIZE)
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ addr);
++
++ regnum = MIPS_PS_REGNUM;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + N64_UCONTEXT_SR);
++
++ /* HI and LO. */
++ regnum = mips_regnum (gdbarch)->lo;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + N64_UCONTEXT_LO);
++ regnum = mips_regnum (gdbarch)->hi;
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_num_regs (gdbarch),
++ ucontext_addr + N64_UCONTEXT_HI);
++
++ if (target_read_memory (ucontext_addr + N64_UCONTEXT_FPUSED, buf, 4) == 0 &&
++ extract_unsigned_integer (buf, 4, byte_order) != 0)
++ {
++ for (regnum = 0, addr = ucontext_addr + N64_UCONTEXT_FPREGS;
++ regnum < 32; regnum++, addr += N64_UCONTEXT_REG_SIZE)
++ trad_frame_set_reg_addr (cache,
++ regnum + gdbarch_fp0_regnum (gdbarch),
++ addr);
++ trad_frame_set_reg_addr (cache, mips_regnum (gdbarch)->fp_control_status,
++ addr);
++ }
++
++ trad_frame_set_id (cache, frame_id_build (sp, func));
++}
++
++#define MIPS_INST_DADDIU_A0_SP_N64 (0x67a40000 \
++ + N64_SIGFRAME_UCONTEXT_OFFSET)
++
++static const struct tramp_frame mips64_fbsd_sigframe =
++{
++ SIGTRAMP_FRAME,
++ MIPS_INSN32_SIZE,
++ {
++ { MIPS_INST_DADDIU_A0_SP_N64, -1 }, /* daddiu a0, sp, SIGF_UC */
++ { MIPS_INST_LI_V0_SIGRETURN, -1 }, /* li v0, SYS_sigreturn */
++ { MIPS_INST_SYSCALL, -1 }, /* syscall */
++ { MIPS_INST_BREAK, -1 }, /* break */
++ { TRAMP_SENTINEL_INSN, -1 }
++ },
++ mips64_fbsd_sigframe_init
++};
++
++/* Shared library support. */
++
++/* FreeBSD/mips uses a slightly different `struct link_map' than the
++ other FreeBSD platforms as it includes an additional `l_off'
++ member. */
++
++static struct link_map_offsets *
++mips_fbsd_ilp32_fetch_link_map_offsets (void)
++{
++ static struct link_map_offsets lmo;
++ static struct link_map_offsets *lmp = NULL;
++
++ if (lmp == NULL)
++ {
++ lmp = &lmo;
++
++ lmo.r_version_offset = 0;
++ lmo.r_version_size = 4;
++ lmo.r_map_offset = 4;
++ lmo.r_brk_offset = 8;
++ lmo.r_ldsomap_offset = -1;
++
++ lmo.link_map_size = 24;
++ lmo.l_addr_offset = 0;
++ lmo.l_name_offset = 8;
++ lmo.l_ld_offset = 12;
++ lmo.l_next_offset = 16;
++ lmo.l_prev_offset = 20;
++ }
++
++ return lmp;
++}
++
++static struct link_map_offsets *
++mips_fbsd_lp64_fetch_link_map_offsets (void)
++{
++ static struct link_map_offsets lmo;
++ static struct link_map_offsets *lmp = NULL;
++
++ if (lmp == NULL)
++ {
++ lmp = &lmo;
++
++ lmo.r_version_offset = 0;
++ lmo.r_version_size = 4;
++ lmo.r_map_offset = 8;
++ lmo.r_brk_offset = 16;
++ lmo.r_ldsomap_offset = -1;
++
++ lmo.link_map_size = 48;
++ lmo.l_addr_offset = 0;
++ lmo.l_name_offset = 16;
++ lmo.l_ld_offset = 24;
++ lmo.l_next_offset = 32;
++ lmo.l_prev_offset = 40;
++ }
++
++ return lmp;
++}
++
++static void
++mips_fbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
++{
++ enum mips_abi abi = mips_abi (gdbarch);
++
++ /* Generic FreeBSD support. */
++ fbsd_init_abi (info, gdbarch);
++
++ set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
++
++ switch (abi)
++ {
++ case MIPS_ABI_O32:
++ tramp_frame_prepend_unwinder (gdbarch, &mips_fbsd_sigframe);
++ break;
++ case MIPS_ABI_N32:
++ break;
++ case MIPS_ABI_N64:
++ tramp_frame_prepend_unwinder (gdbarch, &mips64_fbsd_sigframe);
++ break;
++ }
++
++ set_gdbarch_iterate_over_regset_sections
++ (gdbarch, mips_fbsd_iterate_over_regset_sections);
++
++ /* FreeBSD/mips has SVR4-style shared libraries. */
++ set_solib_svr4_fetch_link_map_offsets
++ (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32 ?
++ mips_fbsd_ilp32_fetch_link_map_offsets :
++ mips_fbsd_lp64_fetch_link_map_offsets));
++}
++
++
++/* Provide a prototype to silence -Wmissing-prototypes. */
++void _initialize_mips_fbsd_tdep (void);
++
++void
++_initialize_mips_fbsd_tdep (void)
++{
++ gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_FREEBSD_ELF,
++ mips_fbsd_init_abi);
++}
+diff --git gdb/mips-fbsd-tdep.h gdb/mips-fbsd-tdep.h
+new file mode 100644
+index 0000000000..8a197e6325
+--- /dev/null
++++ gdb/mips-fbsd-tdep.h
+@@ -0,0 +1,28 @@
++/* Common target dependent code for GDB on MIPS systems running FreeBSD.
++
++ Copyright (C) 2017 Free Software Foundation, Inc.
++
++ This file is part of GDB.
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 3 of the License, or
++ (at your option) any later version.
++
++ This program is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with this program. If not, see <http://www.gnu.org/licenses/>. */
++
++#ifndef MIPS_FBSD_TDEP_H
++#define MIPS_FBSD_TDEP_H
++
++void mips_fbsd_supply_fpregs (struct regcache *, int, const void *, size_t);
++void mips_fbsd_supply_gregs (struct regcache *, int, const void *, size_t);
++void mips_fbsd_collect_fpregs (const struct regcache *, int, void *, size_t);
++void mips_fbsd_collect_gregs (const struct regcache *, int, void *, size_t);
++
++#endif /* MIPS_FBSD_TDEP_H */
diff --git a/devel/gdb/files/commit-b268007c68 b/devel/gdb/files/commit-b268007c68
new file mode 100644
index 000000000000..ea8891cf3b2b
--- /dev/null
+++ b/devel/gdb/files/commit-b268007c68
@@ -0,0 +1,382 @@
+commit acde9e8dc95a053909e137c1fcda94c719eb8cc1
+Author: John Baldwin <jhb@FreeBSD.org>
+Date: Wed Jan 4 09:41:58 2017 -0800
+
+ Add native target for FreeBSD/mips.
+
+ This supports the o32 and n64 ABIs.
+
+ gdb/ChangeLog:
+
+ * Makefile.in (ALLDEPFILES): Add mips-fbsd-nat.c.
+ * NEWS: Mention new FreeBSD/mips native configuration.
+ * config/mips/fbsd.mh: New file.
+ * configure.host: Add mips*-*-freebsd*.
+ * mips-fbsd-nat.c: New file.
+
+diff --git gdb/Makefile.in gdb/Makefile.in
+index 300c2cb702..433dd1203a 100644
+--- gdb/Makefile.in
++++ gdb/Makefile.in
+@@ -1725,6 +1725,7 @@ ALLDEPFILES = \
+ m88k-tdep.c m88kbsd-nat.c \
+ microblaze-tdep.c microblaze-linux-tdep.c \
+ mingw-hdep.c common/mingw-strerror.c \
++ mips-fbsd-nat.c \
+ mips-fbsd-tdep.c \
+ mips-linux-nat.c mips-linux-tdep.c \
+ mips-sde-tdep.c \
+diff --git gdb/config/mips/fbsd.mh gdb/config/mips/fbsd.mh
+new file mode 100644
+index 0000000000..f433347a20
+--- /dev/null
++++ gdb/config/mips/fbsd.mh
+@@ -0,0 +1,3 @@
++# Host: FreeBSD/mips
++NATDEPFILES= fork-child.o inf-ptrace.o fbsd-nat.o mips-fbsd-nat.o
++HAVE_NATIVE_GCORE_HOST = 1
+diff --git gdb/configure.host gdb/configure.host
+index ef265ebe29..c45f61dbba 100644
+--- gdb/configure.host
++++ gdb/configure.host
+@@ -129,6 +129,7 @@ m88*-*-openbsd*) gdb_host=obsd ;;
+ mips*-*-linux*) gdb_host=linux ;;
+ mips*-*-netbsd* | mips*-*-knetbsd*-gnu)
+ gdb_host=nbsd ;;
++mips*-*-freebsd*) gdb_host=fbsd ;;
+ mips64*-*-openbsd*) gdb_host=obsd64 ;;
+
+ powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
+diff --git gdb/mips-fbsd-nat.c gdb/mips-fbsd-nat.c
+new file mode 100644
+index 0000000000..0472df88f4
+--- /dev/null
++++ gdb/mips-fbsd-nat.c
+@@ -0,0 +1,136 @@
++/* Native-dependent code for FreeBSD/mips.
++
++ Copyright (C) 2017 Free Software Foundation, Inc.
++
++ This file is part of GDB.
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 3 of the License, or
++ (at your option) any later version.
++
++ This program is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with this program. If not, see <http://www.gnu.org/licenses/>. */
++
++#include "defs.h"
++#include "inferior.h"
++#include "regcache.h"
++#include "target.h"
++
++#include <sys/types.h>
++#include <sys/ptrace.h>
++#include <machine/reg.h>
++
++#include "fbsd-nat.h"
++#include "mips-tdep.h"
++#include "mips-fbsd-tdep.h"
++#include "inf-ptrace.h"
++
++/* Determine if PT_GETREGS fetches this register. */
++
++static bool
++getregs_supplies (struct gdbarch *gdbarch, int regnum)
++{
++ return (regnum >= MIPS_ZERO_REGNUM
++ && regnum <= gdbarch_pc_regnum (gdbarch));
++}
++
++/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
++ for all registers. */
++
++static void
++mips_fbsd_fetch_inferior_registers (struct target_ops *ops,
++ struct regcache *regcache, int regnum)
++{
++ struct gdbarch *gdbarch = get_regcache_arch (regcache);
++ if (regnum == -1 || getregs_supplies (gdbarch, regnum))
++ {
++ struct reg regs;
++
++ if (ptrace (PT_GETREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
++ perror_with_name (_("Couldn't get registers"));
++
++ mips_fbsd_supply_gregs (regcache, regnum, &regs, sizeof (register_t));
++ if (regnum != -1)
++ return;
++ }
++
++ if (regnum == -1
++ || regnum >= gdbarch_fp0_regnum (get_regcache_arch (regcache)))
++ {
++ struct fpreg fpregs;
++
++ if (ptrace (PT_GETFPREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
++ perror_with_name (_("Couldn't get floating point status"));
++
++ mips_fbsd_supply_fpregs (regcache, regnum, &fpregs,
++ sizeof (f_register_t));
++ }
++}
++
++/* Store register REGNUM back into the inferior. If REGNUM is -1, do
++ this for all registers. */
++
++static void
++mips_fbsd_store_inferior_registers (struct target_ops *ops,
++ struct regcache *regcache, int regnum)
++{
++ struct gdbarch *gdbarch = get_regcache_arch (regcache);
++ if (regnum == -1 || getregs_supplies (gdbarch, regnum))
++ {
++ struct reg regs;
++
++ if (ptrace (PT_GETREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
++ perror_with_name (_("Couldn't get registers"));
++
++ mips_fbsd_collect_gregs (regcache, regnum, (char *) &regs,
++ sizeof (register_t));
++
++ if (ptrace (PT_SETREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
++ perror_with_name (_("Couldn't write registers"));
++
++ if (regnum != -1)
++ return;
++ }
++
++ if (regnum == -1
++ || regnum >= gdbarch_fp0_regnum (get_regcache_arch (regcache)))
++ {
++ struct fpreg fpregs;
++
++ if (ptrace (PT_GETFPREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
++ perror_with_name (_("Couldn't get floating point status"));
++
++ mips_fbsd_collect_fpregs (regcache, regnum, (char *) &fpregs,
++ sizeof (f_register_t));
++
++ if (ptrace (PT_SETFPREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
++ perror_with_name (_("Couldn't write floating point status"));
++ }
++}
++
++
++/* Provide a prototype to silence -Wmissing-prototypes. */
++void _initialize_mips_fbsd_nat (void);
++
++void
++_initialize_mips_fbsd_nat (void)
++{
++ struct target_ops *t;
++
++ t = inf_ptrace_target ();
++ t->to_fetch_registers = mips_fbsd_fetch_inferior_registers;
++ t->to_store_registers = mips_fbsd_store_inferior_registers;
++ fbsd_nat_add_target (t);
++}
+commit acde9e8dc95a053909e137c1fcda94c719eb8cc1
+Author: John Baldwin <jhb@FreeBSD.org>
+Date: Wed Jan 4 09:41:58 2017 -0800
+
+ Add native target for FreeBSD/mips.
+
+ This supports the o32 and n64 ABIs.
+
+ gdb/ChangeLog:
+
+ * Makefile.in (ALLDEPFILES): Add mips-fbsd-nat.c.
+ * NEWS: Mention new FreeBSD/mips native configuration.
+ * config/mips/fbsd.mh: New file.
+ * configure.host: Add mips*-*-freebsd*.
+ * mips-fbsd-nat.c: New file.
+
+diff --git gdb/Makefile.in gdb/Makefile.in
+index 300c2cb702..433dd1203a 100644
+--- gdb/Makefile.in
++++ gdb/Makefile.in
+@@ -1725,6 +1725,7 @@ ALLDEPFILES = \
+ m88k-tdep.c m88kbsd-nat.c \
+ microblaze-tdep.c microblaze-linux-tdep.c \
+ mingw-hdep.c common/mingw-strerror.c \
++ mips-fbsd-nat.c \
+ mips-fbsd-tdep.c \
+ mips-linux-nat.c mips-linux-tdep.c \
+ mips-sde-tdep.c \
+diff --git gdb/config/mips/fbsd.mh gdb/config/mips/fbsd.mh
+new file mode 100644
+index 0000000000..f433347a20
+--- /dev/null
++++ gdb/config/mips/fbsd.mh
+@@ -0,0 +1,3 @@
++# Host: FreeBSD/mips
++NATDEPFILES= fork-child.o inf-ptrace.o fbsd-nat.o mips-fbsd-nat.o
++HAVE_NATIVE_GCORE_HOST = 1
+diff --git gdb/configure.host gdb/configure.host
+index ef265ebe29..c45f61dbba 100644
+--- gdb/configure.host
++++ gdb/configure.host
+@@ -129,6 +129,7 @@ m88*-*-openbsd*) gdb_host=obsd ;;
+ mips*-*-linux*) gdb_host=linux ;;
+ mips*-*-netbsd* | mips*-*-knetbsd*-gnu)
+ gdb_host=nbsd ;;
++mips*-*-freebsd*) gdb_host=fbsd ;;
+ mips64*-*-openbsd*) gdb_host=obsd64 ;;
+
+ powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
+diff --git gdb/mips-fbsd-nat.c gdb/mips-fbsd-nat.c
+new file mode 100644
+index 0000000000..0472df88f4
+--- /dev/null
++++ gdb/mips-fbsd-nat.c
+@@ -0,0 +1,136 @@
++/* Native-dependent code for FreeBSD/mips.
++
++ Copyright (C) 2017 Free Software Foundation, Inc.
++
++ This file is part of GDB.
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 3 of the License, or
++ (at your option) any later version.
++
++ This program is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with this program. If not, see <http://www.gnu.org/licenses/>. */
++
++#include "defs.h"
++#include "inferior.h"
++#include "regcache.h"
++#include "target.h"
++
++#include <sys/types.h>
++#include <sys/ptrace.h>
++#include <machine/reg.h>
++
++#include "fbsd-nat.h"
++#include "mips-tdep.h"
++#include "mips-fbsd-tdep.h"
++#include "inf-ptrace.h"
++
++/* Determine if PT_GETREGS fetches this register. */
++
++static bool
++getregs_supplies (struct gdbarch *gdbarch, int regnum)
++{
++ return (regnum >= MIPS_ZERO_REGNUM
++ && regnum <= gdbarch_pc_regnum (gdbarch));
++}
++
++/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
++ for all registers. */
++
++static void
++mips_fbsd_fetch_inferior_registers (struct target_ops *ops,
++ struct regcache *regcache, int regnum)
++{
++ struct gdbarch *gdbarch = get_regcache_arch (regcache);
++ if (regnum == -1 || getregs_supplies (gdbarch, regnum))
++ {
++ struct reg regs;
++
++ if (ptrace (PT_GETREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
++ perror_with_name (_("Couldn't get registers"));
++
++ mips_fbsd_supply_gregs (regcache, regnum, &regs, sizeof (register_t));
++ if (regnum != -1)
++ return;
++ }
++
++ if (regnum == -1
++ || regnum >= gdbarch_fp0_regnum (get_regcache_arch (regcache)))
++ {
++ struct fpreg fpregs;
++
++ if (ptrace (PT_GETFPREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
++ perror_with_name (_("Couldn't get floating point status"));
++
++ mips_fbsd_supply_fpregs (regcache, regnum, &fpregs,
++ sizeof (f_register_t));
++ }
++}
++
++/* Store register REGNUM back into the inferior. If REGNUM is -1, do
++ this for all registers. */
++
++static void
++mips_fbsd_store_inferior_registers (struct target_ops *ops,
++ struct regcache *regcache, int regnum)
++{
++ struct gdbarch *gdbarch = get_regcache_arch (regcache);
++ if (regnum == -1 || getregs_supplies (gdbarch, regnum))
++ {
++ struct reg regs;
++
++ if (ptrace (PT_GETREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
++ perror_with_name (_("Couldn't get registers"));
++
++ mips_fbsd_collect_gregs (regcache, regnum, (char *) &regs,
++ sizeof (register_t));
++
++ if (ptrace (PT_SETREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &regs, 0) == -1)
++ perror_with_name (_("Couldn't write registers"));
++
++ if (regnum != -1)
++ return;
++ }
++
++ if (regnum == -1
++ || regnum >= gdbarch_fp0_regnum (get_regcache_arch (regcache)))
++ {
++ struct fpreg fpregs;
++
++ if (ptrace (PT_GETFPREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
++ perror_with_name (_("Couldn't get floating point status"));
++
++ mips_fbsd_collect_fpregs (regcache, regnum, (char *) &fpregs,
++ sizeof (f_register_t));
++
++ if (ptrace (PT_SETFPREGS, get_ptrace_pid (inferior_ptid),
++ (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
++ perror_with_name (_("Couldn't write floating point status"));
++ }
++}
++
++
++/* Provide a prototype to silence -Wmissing-prototypes. */
++void _initialize_mips_fbsd_nat (void);
++
++void
++_initialize_mips_fbsd_nat (void)
++{
++ struct target_ops *t;
++
++ t = inf_ptrace_target ();
++ t->to_fetch_registers = mips_fbsd_fetch_inferior_registers;
++ t->to_store_registers = mips_fbsd_store_inferior_registers;
++ fbsd_nat_add_target (t);
++}
diff --git a/devel/gdb/files/extrapatch-base-readline b/devel/gdb/files/extrapatch-base-readline
deleted file mode 100644
index fba0f48ed649..000000000000
--- a/devel/gdb/files/extrapatch-base-readline
+++ /dev/null
@@ -1,11 +0,0 @@
---- gdb/completer.c.orig 2016-05-10 14:11:58.546188879 +0200
-+++ gdb/completer.c 2016-05-10 14:12:22.899187374 +0200
-@@ -1767,6 +1767,8 @@
- return displayer->width;
- }
-
-+_rl_completion_prefix_display_length=0;
-+rl_sort_completion_matches=1;
- extern int _rl_completion_prefix_display_length;
- extern int _rl_print_completions_horizontally;
-
diff --git a/devel/gdb/files/extrapatch-kgdb b/devel/gdb/files/extrapatch-kgdb
index ef0465973fcc..5b6715e052d0 100644
--- a/devel/gdb/files/extrapatch-kgdb
+++ b/devel/gdb/files/extrapatch-kgdb
@@ -1,8 +1,8 @@
diff --git gdb/Makefile.in gdb/Makefile.in
-index dfaa8a3..182d875 100644
+index 5b6ccea764..f501cf29d1 100644
--- gdb/Makefile.in
+++ gdb/Makefile.in
-@@ -207,7 +207,8 @@
+@@ -212,7 +212,8 @@ INCGNU = -I$(srcdir)/gnulib/import -I$(GNULIB_BUILDDIR)/import
# Generated headers in the gnulib directory. These must be listed
# so that they are generated before other files are compiled.
@@ -12,7 +12,7 @@ index dfaa8a3..182d875 100644
#
# CLI sub directory definitons
-@@ -650,7 +650,8 @@ ALL_64_TARGET_OBS = \
+@@ -653,7 +654,8 @@ ALL_64_TARGET_OBS = \
ia64-linux-tdep.o ia64-vms-tdep.o ia64-tdep.o \
mips64obsd-tdep.o \
sparc64fbsd-tdep.o sparc64-linux-tdep.o sparc64nbsd-tdep.o \
@@ -22,15 +22,16 @@ index dfaa8a3..182d875 100644
# All other target-dependent objects files (used with --enable-targets=all).
ALL_TARGET_OBS = \
-@@ -672,6 +673,7 @@ ALL_TARGET_OBS = \
+@@ -676,6 +678,8 @@ ALL_TARGET_OBS = \
i386-sol2-tdep.o i386-tdep.o i387-tdep.o \
i386-dicos-tdep.o i386-darwin-tdep.o \
iq2000-tdep.o \
+ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o i386fbsd-kern.o ppcfbsd-kern.o \
++ mipsfbsd-kern.o \
linux-tdep.o \
lm32-tdep.o \
m32c-tdep.o \
-@@ -1123,7 +1125,7 @@ generated_files = config.h observer.h observer.inc ada-lex.c jit-reader.h \
+@@ -1133,7 +1137,7 @@ generated_files = config.h observer.h observer.inc ada-lex.c jit-reader.h \
$(COMPILE) $<
$(POSTCOMPILE)
@@ -39,7 +40,7 @@ index dfaa8a3..182d875 100644
@$(MAKE) $(FLAGS_TO_PASS) DO=all "DODIRS=`echo $(SUBDIRS) | sed 's/testsuite//'`" subdir_do
installcheck:
-@@ -1393,6 +1395,12 @@ gdb$(EXEEXT): gdb.o $(LIBGDB_OBS) $(ADD_DEPS) $(CDEPS) $(TDEPLIBS)
+@@ -1412,6 +1416,12 @@ gdb$(EXEEXT): gdb.o $(LIBGDB_OBS) $(ADD_DEPS) $(CDEPS) $(TDEPLIBS)
-o gdb$(EXEEXT) gdb.o $(LIBGDB_OBS) \
$(TDEPLIBS) $(TUI_LIBRARY) $(CLIBS) $(LOADLIBES)
@@ -52,7 +53,7 @@ index dfaa8a3..182d875 100644
# Convenience rule to handle recursion.
$(LIBGNU) $(GNULIB_H): all-lib
all-lib: $(GNULIB_BUILDDIR)/Makefile
-@@ -1437,7 +1445,7 @@ clean mostlyclean: $(CONFIG_CLEAN)
+@@ -1456,7 +1466,7 @@ clean mostlyclean: $(CONFIG_CLEAN)
@$(MAKE) $(FLAGS_TO_PASS) DO=clean "DODIRS=$(CLEANDIRS)" subdir_do
rm -f *.o *.a $(ADD_FILES) *~ init.c-tmp init.l-tmp version.c-tmp
rm -f init.c version.c observer.h observer.inc
@@ -61,17 +62,17 @@ index dfaa8a3..182d875 100644
rm -f gdb[0-9]$(EXEEXT)
rm -f test-cp-name-parser$(EXEEXT)
rm -f xml-builtin.c stamp-xml
-@@ -1667,6 +1675,9 @@ ALLDEPFILES = \
+@@ -1688,6 +1698,9 @@ ALLDEPFILES = \
core-regset.c \
dcache.c dicos-tdep.c darwin-nat.c \
exec.c \
+ fbsd-kld.c fbsd-kthr.c fbsd-kvm.c \
-+ amd64fbsd-kern.c i386fbsd-kern.c ppcfbsd-kern.c \
++ amd64fbsd-kern.c i386fbsd-kern.c mipsfbsd-kern.c ppcfbsd-kern.c \
+ sparc64fbsd-kern.c \
fbsd-nat.c \
fbsd-tdep.c \
fork-child.c \
-@@ -2740,7 +2752,7 @@
+@@ -2761,7 +2774,7 @@ py-varobj.o: $(srcdir)/python/py-varobj.c
# A list of all the objects we might care about in this build, for
# dependency tracking.
@@ -81,10 +82,10 @@ index dfaa8a3..182d875 100644
# Ensure that generated files are created early. Use order-only
diff --git gdb/config.in gdb/config.in
-index 9ef53b3..c55c01b 100644
+index c82a5b4bac..34140b2d59 100644
--- gdb/config.in
+++ gdb/config.in
-@@ -216,6 +216,9 @@
+@@ -219,6 +219,9 @@
/* Define to 1 if your system has the kinfo_getvmmap function. */
#undef HAVE_KINFO_GETVMMAP
@@ -95,10 +96,10 @@ index 9ef53b3..c55c01b 100644
#undef HAVE_LANGINFO_CODESET
diff --git gdb/configure gdb/configure
-index 48acfe5..f0cd958 100755
+index b5c045cf10..68299ff16c 100755
--- gdb/configure
+++ gdb/configure
-@@ -7104,6 +7104,66 @@ $as_echo "#define HAVE_KINFO_GETVMMAP 1" >>confdefs.h
+@@ -7112,6 +7112,66 @@ $as_echo "#define HAVE_KINFO_GETVMMAP 1" >>confdefs.h
fi
@@ -163,13 +164,13 @@ index 48acfe5..f0cd958 100755
+
+
-
-
+ if test "X$prefix" = "XNONE"; then
+ acl_final_prefix="$ac_default_prefix"
diff --git gdb/configure.ac gdb/configure.ac
-index a40860a..9035d48 100644
+index f774db7ea6..efccdd3fb1 100644
--- gdb/configure.ac
+++ gdb/configure.ac
-@@ -539,6 +539,11 @@ AC_SEARCH_LIBS(kinfo_getvmmap, util,
+@@ -540,6 +540,11 @@ AC_SEARCH_LIBS(kinfo_getvmmap, util util-freebsd,
[AC_DEFINE(HAVE_KINFO_GETVMMAP, 1,
[Define to 1 if your system has the kinfo_getvmmap function. ])])
@@ -181,11 +182,71 @@ index a40860a..9035d48 100644
AM_ICONV
# GDB may fork/exec the iconv program to get the list of supported character
+diff --git gdb/configure.tgt gdb/configure.tgt
+index 9ee9f7a799..fb14b19405 100644
+--- gdb/configure.tgt
++++ gdb/configure.tgt
+@@ -190,7 +190,13 @@ i[34567]86-*-dicos*)
+ i[34567]86-*-freebsd* | i[34567]86-*-kfreebsd*-gnu)
+ # Target: FreeBSD/i386
+ gdb_target_obs="i386-tdep.o i387-tdep.o i386bsd-tdep.o i386fbsd-tdep.o \
+- bsd-uthread.o fbsd-tdep.o solib-svr4.o"
++ bsd-uthread.o fbsd-tdep.o solib-svr4.o \
++ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o i386fbsd-kern.o"
++ if test "x$enable_64_bit_bfd" = "xyes"; then
++ # Target: FreeBSD amd64
++ gdb_target_obs="amd64-tdep.o amd64fbsd-tdep.o amd64fbsd-kern.o \
++ ${gdb_target_obs}"
++ fi
+ ;;
+ i[34567]86-*-netbsd* | i[34567]86-*-knetbsd*-gnu)
+ # Target: NetBSD/i386
+@@ -360,7 +366,8 @@ mips*-*-netbsd* | mips*-*-knetbsd*-gnu)
+ ;;
+ mips*-*-freebsd*)
+ # Target: MIPS running FreeBSD
+- gdb_target_obs="mips-tdep.o mips-fbsd-tdep.o solib-svr4.o fbsd-tdep.o"
++ gdb_target_obs="mips-tdep.o mips-fbsd-tdep.o solib-svr4.o fbsd-tdep.o \
++ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o mipsfbsd-kern.o"
+ gdb_sim=../sim/mips/libsim.a
+ ;;
+ mips64*-*-openbsd*)
+@@ -419,7 +426,8 @@ powerpc*-*-freebsd*)
+ # Target: FreeBSD/powerpc
+ gdb_target_obs="rs6000-tdep.o ppc-sysv-tdep.o ppc64-tdep.o \
+ ppcfbsd-tdep.o fbsd-tdep.o solib-svr4.o \
+- ravenscar-thread.o ppc-ravenscar-thread.o"
++ ravenscar-thread.o ppc-ravenscar-thread.o \
++ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o ppcfbsd-kern.o"
+ ;;
+
+ powerpc-*-netbsd* | powerpc-*-knetbsd*-gnu)
+@@ -543,7 +551,8 @@ sparc*-*-freebsd* | sparc*-*-kfreebsd*-gnu)
+ # Target: FreeBSD/sparc64
+ gdb_target_obs="sparc-tdep.o sparc64-tdep.o sparc64fbsd-tdep.o \
+ fbsd-tdep.o solib-svr4.o \
+- ravenscar-thread.o sparc-ravenscar-thread.o"
++ ravenscar-thread.o sparc-ravenscar-thread.o \
++ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o sparc64fbsd-kern.o"
+ ;;
+ sparc-*-netbsd* | sparc-*-knetbsd*-gnu)
+ # Target: NetBSD/sparc
+@@ -674,7 +683,9 @@ x86_64-*-freebsd* | x86_64-*-kfreebsd*-gnu)
+ # Target: FreeBSD/amd64
+ gdb_target_obs="amd64-tdep.o amd64fbsd-tdep.o i386-tdep.o \
+ i387-tdep.o i386bsd-tdep.o i386fbsd-tdep.o \
+- bsd-uthread.o fbsd-tdep.o solib-svr4.o"
++ bsd-uthread.o fbsd-tdep.o solib-svr4.o \
++ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o amd64fbsd-kern.o \
++ i386fbsd-kern.o"
+ ;;
+ x86_64-*-mingw* | x86_64-*-cygwin*)
+ # Target: MingW/amd64
diff --git gdb/defs.h gdb/defs.h
-index ccdab18..499944f 100644
+index 9b44f44349..f176be1108 100644
--- gdb/defs.h
+++ gdb/defs.h
-@@ -549,6 +549,7 @@ enum gdb_osabi
+@@ -598,6 +598,7 @@ enum gdb_osabi
GDB_OSABI_LINUX,
GDB_OSABI_FREEBSD_AOUT,
GDB_OSABI_FREEBSD_ELF,
@@ -194,7 +255,7 @@ index ccdab18..499944f 100644
GDB_OSABI_NETBSD_ELF,
GDB_OSABI_OPENBSD_ELF,
diff --git gdb/osabi.c gdb/osabi.c
-index f7d4e74..130ffef 100644
+index f7d4e74239..130ffef37e 100644
--- gdb/osabi.c
+++ gdb/osabi.c
@@ -66,6 +66,7 @@ static const struct osabi_names gdb_osabi_names[] =
@@ -206,7 +267,7 @@ index f7d4e74..130ffef 100644
{ "NetBSD/ELF", NULL },
{ "OpenBSD/ELF", NULL },
diff --git gdb/regcache.c gdb/regcache.c
-index a5c90a6..05044e5 100644
+index a5c90a6314..05044e5293 100644
--- gdb/regcache.c
+++ gdb/regcache.c
@@ -1083,6 +1083,20 @@ regcache_raw_supply (struct regcache *regcache, int regnum, const void *buf)
@@ -231,10 +292,10 @@ index a5c90a6..05044e5 100644
void
diff --git gdb/regcache.h gdb/regcache.h
-index a9fb44b..a156918 100644
+index 1bb0ce0ec8..65783b6355 100644
--- gdb/regcache.h
+++ gdb/regcache.h
-@@ -147,6 +147,8 @@ extern void regcache_write_pc (struct regcache *regcache, CORE_ADDR pc);
+@@ -135,6 +135,8 @@ extern void regcache_write_pc (struct regcache *regcache, CORE_ADDR pc);
extern void regcache_raw_supply (struct regcache *regcache,
int regnum, const void *buf);
@@ -243,53 +304,3 @@ index a9fb44b..a156918 100644
extern void regcache_raw_collect (const struct regcache *regcache,
int regnum, void *buf);
-diff --git gdb/configure.tgt gdb/configure.tgt
-index 4e4d6a9..57e4b3a 100644
---- gdb/configure.tgt
-+++ gdb/configure.tgt
-@@ -185,7 +185,13 @@ i[34567]86-*-dicos*)
- i[34567]86-*-freebsd* | i[34567]86-*-kfreebsd*-gnu)
- # Target: FreeBSD/i386
- gdb_target_obs="i386-tdep.o i387-tdep.o i386bsd-tdep.o i386fbsd-tdep.o \
-- bsd-uthread.o fbsd-tdep.o solib-svr4.o"
-+ bsd-uthread.o fbsd-tdep.o solib-svr4.o \
-+ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o i386fbsd-kern.o"
-+ if test "x$enable_64_bit_bfd" = "xyes"; then
-+ # Target: FreeBSD amd64
-+ gdb_target_obs="amd64-tdep.o amd64fbsd-tdep.o amd64fbsd-kern.o \
-+ ${gdb_target_obs}"
-+ fi
- ;;
- i[34567]86-*-netbsd* | i[34567]86-*-knetbsd*-gnu)
- # Target: NetBSD/i386
-@@ -405,7 +411,8 @@ powerpc*-*-freebsd*)
- # Target: FreeBSD/powerpc
- gdb_target_obs="rs6000-tdep.o ppc-sysv-tdep.o ppc64-tdep.o \
- ppcfbsd-tdep.o fbsd-tdep.o solib-svr4.o \
-- ravenscar-thread.o ppc-ravenscar-thread.o"
-+ ravenscar-thread.o ppc-ravenscar-thread.o \
-+ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o ppcfbsd-kern.o"
- ;;
-
- powerpc-*-netbsd* | powerpc-*-knetbsd*-gnu)
-@@ -534,7 +541,8 @@ sparc*-*-freebsd* | sparc*-*-kfreebsd*-gnu)
- # Target: FreeBSD/sparc64
- gdb_target_obs="sparc-tdep.o sparc64-tdep.o sparc64fbsd-tdep.o \
- fbsd-tdep.o solib-svr4.o \
-- ravenscar-thread.o sparc-ravenscar-thread.o"
-+ ravenscar-thread.o sparc-ravenscar-thread.o \
-+ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o sparc64fbsd-kern.o"
- ;;
- sparc-*-netbsd* | sparc-*-knetbsd*-gnu)
- # Target: NetBSD/sparc
-@@ -662,7 +670,9 @@ x86_64-*-freebsd* | x86_64-*-kfreebsd*-gnu)
- # Target: FreeBSD/amd64
- gdb_target_obs="amd64-tdep.o amd64fbsd-tdep.o i386-tdep.o \
- i387-tdep.o i386bsd-tdep.o i386fbsd-tdep.o \
-- bsd-uthread.o fbsd-tdep.o solib-svr4.o"
-+ bsd-uthread.o fbsd-tdep.o solib-svr4.o \
-+ fbsd-kld.o fbsd-kthr.o fbsd-kvm.o amd64fbsd-kern.o \
-+ i386fbsd-kern.o"
- ;;
- x86_64-*-mingw* | x86_64-*-cygwin*)
- # Target: MingW/amd64
diff --git a/devel/gdb/files/kgdb/mipsfbsd-kern.c b/devel/gdb/files/kgdb/mipsfbsd-kern.c
new file mode 100644
index 000000000000..9f438000c43c
--- /dev/null
+++ b/devel/gdb/files/kgdb/mipsfbsd-kern.c
@@ -0,0 +1,610 @@
+/*
+ * Copyright (c) 2007 Juniper Networks, Inc.
+ * Copyright (c) 2004 Marcel Moolenaar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * from: src/gnu/usr.bin/gdb/kgdb/trgt_alpha.c,v 1.2.2.1 2005/09/15 05:32:10 marcel
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#ifdef __mips__
+#include <machine/asm.h>
+#include <machine/pcb.h>
+#include <machine/frame.h>
+#endif
+#include <string.h>
+
+#include <defs.h>
+#include <frame-unwind.h>
+//#include <target.h>
+//#include <gdbthread.h>
+//#include <inferior.h>
+#include "osabi.h"
+#include <regcache.h>
+#include "solib.h"
+#include "trad-frame.h"
+#include <mips-tdep.h>
+
+#include "kgdb.h"
+
+/* Size of struct trapframe in registers. */
+#define TRAPFRAME_WORDS 74
+
+/* From sys/mips/include/pcb.h. Offsets in the pcb_context[] array. */
+#define FBSD_PCB_REG_S0 0
+#define FBSD_PCB_REG_S1 1
+#define FBSD_PCB_REG_S2 2
+#define FBSD_PCB_REG_S3 3
+#define FBSD_PCB_REG_S4 4
+#define FBSD_PCB_REG_S5 5
+#define FBSD_PCB_REG_S6 6
+#define FBSD_PCB_REG_S7 7
+#define FBSD_PCB_REG_SP 8
+#define FBSD_PCB_REG_S8 9
+#define FBSD_PCB_REG_RA 10
+#define FBSD_PCB_REG_SR 11
+#define FBSD_PCB_REG_GP 12
+#define FBSD_PCB_REG_PC 13
+
+#ifdef __mips__
+_Static_assert(TRAPFRAME_WORDS * sizeof(register_t) ==
+ sizeof(struct trapframe), "TRAPFRAME_WORDS mismatch");
+_Static_assert(FBSD_PCB_REG_S0 == PCB_REG_S0, "PCB_REG_S0 mismatch");
+_Static_assert(FBSD_PCB_REG_S1 == PCB_REG_S1, "PCB_REG_S1 mismatch");
+_Static_assert(FBSD_PCB_REG_S2 == PCB_REG_S2, "PCB_REG_S2 mismatch");
+_Static_assert(FBSD_PCB_REG_S3 == PCB_REG_S3, "PCB_REG_S3 mismatch");
+_Static_assert(FBSD_PCB_REG_S4 == PCB_REG_S4, "PCB_REG_S4 mismatch");
+_Static_assert(FBSD_PCB_REG_S5 == PCB_REG_S5, "PCB_REG_S5 mismatch");
+_Static_assert(FBSD_PCB_REG_S6 == PCB_REG_S6, "PCB_REG_S6 mismatch");
+_Static_assert(FBSD_PCB_REG_S7 == PCB_REG_S7, "PCB_REG_S7 mismatch");
+_Static_assert(FBSD_PCB_REG_SP == PCB_REG_SP, "PCB_REG_SP mismatch");
+_Static_assert(FBSD_PCB_REG_S8 == PCB_REG_S8, "PCB_REG_S8 mismatch");
+_Static_assert(FBSD_PCB_REG_RA == PCB_REG_RA, "PCB_REG_RA mismatch");
+_Static_assert(FBSD_PCB_REG_SR == PCB_REG_SR, "PCB_REG_SR mismatch");
+_Static_assert(FBSD_PCB_REG_GP == PCB_REG_GP, "PCB_REG_GP mismatch");
+_Static_assert(FBSD_PCB_REG_PC == PCB_REG_PC, "PCB_REG_PC mismatch");
+#endif
+
+static void
+mipsfbsd_supply_pcb(struct regcache *regcache, CORE_ADDR pcb_addr)
+{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ size_t regsize = mips_isa_regsize (gdbarch);
+ gdb_byte buf[regsize * (FBSD_PCB_REG_PC + 1)];
+
+ /* Read the entire pcb_context[] array in one go. The pcb_context[]
+ array is after the pcb_regs member which is a trapframe. */
+ if (target_read_memory (pcb_addr + TRAPFRAME_WORDS * regsize, buf,
+ sizeof(buf)) != 0)
+ return;
+
+ regcache_raw_supply_unsigned (regcache, MIPS_ZERO_REGNUM, 0);
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM - 2,
+ buf + (regsize * FBSD_PCB_REG_S0));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM - 1,
+ buf + (regsize * FBSD_PCB_REG_S1));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_S2));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 1,
+ buf + (regsize * FBSD_PCB_REG_S3));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 2,
+ buf + (regsize * FBSD_PCB_REG_S4));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 3,
+ buf + (regsize * FBSD_PCB_REG_S5));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 4,
+ buf + (regsize * FBSD_PCB_REG_S6));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 5,
+ buf + (regsize * FBSD_PCB_REG_S7));
+ regcache_raw_supply (regcache, MIPS_SP_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_SP));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 6,
+ buf + (regsize * FBSD_PCB_REG_S8));
+ regcache_raw_supply (regcache, MIPS_RA_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_RA));
+ regcache_raw_supply (regcache, MIPS_PS_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_SR));
+ regcache_raw_supply (regcache, MIPS_GP_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_GP));
+ regcache_raw_supply (regcache, MIPS_EMBED_PC_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_PC));
+}
+
+static struct trad_frame_cache *
+mipsfbsd_trapframe_cache (struct frame_info *this_frame, void **this_cache)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ size_t regsize = mips_isa_regsize (gdbarch);
+ struct trad_frame_cache *cache;
+ CORE_ADDR addr, func, pc, sp;
+ int regnum;
+
+ if (*this_cache != NULL)
+ return ((struct trad_frame_cache *)*this_cache);
+
+ cache = trad_frame_cache_zalloc (this_frame);
+ *this_cache = cache;
+
+ func = get_frame_func (this_frame);
+ sp = get_frame_register_signed (this_frame,
+ MIPS_SP_REGNUM + gdbarch_num_regs (gdbarch));
+
+ /* Skip over CALLFRAME_SIZ. */
+ addr = sp;
+ if (regsize == 8)
+ addr += regsize * 4;
+ else
+ addr += regsize * (4 + 2);
+
+ /* GPRs. Skip zero. */
+ addr += regsize;
+ for (regnum = MIPS_AT_REGNUM; regnum <= MIPS_RA_REGNUM; regnum++)
+ {
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+ }
+
+ regnum = MIPS_PS_REGNUM;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+
+ /* HI and LO. */
+ regnum = mips_regnum (gdbarch)->lo;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+ regnum = mips_regnum (gdbarch)->hi;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+
+ /* BADVADDR. */
+ regnum = mips_regnum (gdbarch)->badvaddr;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+
+ /* CAUSE. */
+ regnum = mips_regnum (gdbarch)->cause;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+
+ /* PC. */
+ regnum = mips_regnum (gdbarch)->pc;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+
+ trad_frame_set_id (cache, frame_id_build (sp + TRAPFRAME_WORDS * regsize,
+ func));
+ return cache;
+}
+
+static void
+mipsfbsd_trapframe_this_id (struct frame_info *this_frame,
+ void **this_cache, struct frame_id *this_id)
+{
+ struct trad_frame_cache *cache =
+ mipsfbsd_trapframe_cache (this_frame, this_cache);
+
+ trad_frame_get_id (cache, this_id);
+}
+
+static struct value *
+mipsfbsd_trapframe_prev_register (struct frame_info *this_frame,
+ void **this_cache, int regnum)
+{
+ struct trad_frame_cache *cache =
+ mipsfbsd_trapframe_cache (this_frame, this_cache);
+
+ return trad_frame_get_register (cache, this_frame, regnum);
+}
+
+static int
+mipsfbsd_trapframe_sniffer (const struct frame_unwind *self,
+ struct frame_info *this_frame,
+ void **this_prologue_cache)
+{
+ const char *name;
+
+ find_pc_partial_function (get_frame_func (this_frame), &name, NULL, NULL);
+ return (name && ((strcmp(name, "MipsKernIntr") == 0) ||
+ (strcmp(name, "MipsKernGenException") == 0) ||
+ (strcmp(name, "MipsTLBInvalidException") == 0)));
+}
+
+static const struct frame_unwind mipsfbsd_trapframe_unwind = {
+ SIGTRAMP_FRAME,
+ default_frame_unwind_stop_reason,
+ mipsfbsd_trapframe_this_id,
+ mipsfbsd_trapframe_prev_register,
+ NULL,
+ mipsfbsd_trapframe_sniffer
+};
+
+static void
+mipsfbsd_kernel_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
+{
+ enum mips_abi abi = mips_abi (gdbarch);
+
+ set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
+
+ switch (abi)
+ {
+ case MIPS_ABI_O32:
+ break;
+ case MIPS_ABI_N32:
+ set_gdbarch_long_double_bit (gdbarch, 128);
+ /* These floatformats should probably be renamed. MIPS uses
+ the same 128-bit IEEE floating point format that IA-64 uses,
+ except that the quiet/signalling NaN bit is reversed (GDB
+ does not distinguish between quiet and signalling NaNs). */
+ set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
+ break;
+ case MIPS_ABI_N64:
+ set_gdbarch_long_double_bit (gdbarch, 128);
+ /* These floatformats should probably be renamed. MIPS uses
+ the same 128-bit IEEE floating point format that IA-64 uses,
+ except that the quiet/signalling NaN bit is reversed (GDB
+ does not distinguish between quiet and signalling NaNs). */
+ set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
+ break;
+ }
+
+ frame_unwind_prepend_unwinder (gdbarch, &mipsfbsd_trapframe_unwind);
+
+ set_solib_ops (gdbarch, &kld_so_ops);
+
+ fbsd_vmcore_set_supply_pcb (gdbarch, mipsfbsd_supply_pcb);
+ fbsd_vmcore_set_cpu_pcb_addr (gdbarch, kgdb_trgt_stop_pcb);
+}
+
+void _initialize_mips_kgdb_tdep (void);
+
+void
+_initialize_mips_kgdb_tdep (void)
+{
+ gdbarch_register_osabi_sniffer(bfd_arch_mips,
+ bfd_target_elf_flavour,
+ fbsd_kernel_osabi_sniffer);
+ gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_FREEBSD_ELF_KERNEL,
+ mipsfbsd_kernel_init_abi);
+}
+/*
+ * Copyright (c) 2007 Juniper Networks, Inc.
+ * Copyright (c) 2004 Marcel Moolenaar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * from: src/gnu/usr.bin/gdb/kgdb/trgt_alpha.c,v 1.2.2.1 2005/09/15 05:32:10 marcel
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#ifdef __mips__
+#include <machine/asm.h>
+#include <machine/pcb.h>
+#include <machine/frame.h>
+#endif
+#include <string.h>
+
+#include <defs.h>
+#include <frame-unwind.h>
+//#include <target.h>
+//#include <gdbthread.h>
+//#include <inferior.h>
+#include "osabi.h"
+#include <regcache.h>
+#include "solib.h"
+#include "trad-frame.h"
+#include <mips-tdep.h>
+
+#include "kgdb.h"
+
+/* Size of struct trapframe in registers. */
+#define TRAPFRAME_WORDS 74
+
+/* From sys/mips/include/pcb.h. Offsets in the pcb_context[] array. */
+#define FBSD_PCB_REG_S0 0
+#define FBSD_PCB_REG_S1 1
+#define FBSD_PCB_REG_S2 2
+#define FBSD_PCB_REG_S3 3
+#define FBSD_PCB_REG_S4 4
+#define FBSD_PCB_REG_S5 5
+#define FBSD_PCB_REG_S6 6
+#define FBSD_PCB_REG_S7 7
+#define FBSD_PCB_REG_SP 8
+#define FBSD_PCB_REG_S8 9
+#define FBSD_PCB_REG_RA 10
+#define FBSD_PCB_REG_SR 11
+#define FBSD_PCB_REG_GP 12
+#define FBSD_PCB_REG_PC 13
+
+#ifdef __mips__
+_Static_assert(TRAPFRAME_WORDS * sizeof(register_t) ==
+ sizeof(struct trapframe), "TRAPFRAME_WORDS mismatch");
+_Static_assert(FBSD_PCB_REG_S0 == PCB_REG_S0, "PCB_REG_S0 mismatch");
+_Static_assert(FBSD_PCB_REG_S1 == PCB_REG_S1, "PCB_REG_S1 mismatch");
+_Static_assert(FBSD_PCB_REG_S2 == PCB_REG_S2, "PCB_REG_S2 mismatch");
+_Static_assert(FBSD_PCB_REG_S3 == PCB_REG_S3, "PCB_REG_S3 mismatch");
+_Static_assert(FBSD_PCB_REG_S4 == PCB_REG_S4, "PCB_REG_S4 mismatch");
+_Static_assert(FBSD_PCB_REG_S5 == PCB_REG_S5, "PCB_REG_S5 mismatch");
+_Static_assert(FBSD_PCB_REG_S6 == PCB_REG_S6, "PCB_REG_S6 mismatch");
+_Static_assert(FBSD_PCB_REG_S7 == PCB_REG_S7, "PCB_REG_S7 mismatch");
+_Static_assert(FBSD_PCB_REG_SP == PCB_REG_SP, "PCB_REG_SP mismatch");
+_Static_assert(FBSD_PCB_REG_S8 == PCB_REG_S8, "PCB_REG_S8 mismatch");
+_Static_assert(FBSD_PCB_REG_RA == PCB_REG_RA, "PCB_REG_RA mismatch");
+_Static_assert(FBSD_PCB_REG_SR == PCB_REG_SR, "PCB_REG_SR mismatch");
+_Static_assert(FBSD_PCB_REG_GP == PCB_REG_GP, "PCB_REG_GP mismatch");
+_Static_assert(FBSD_PCB_REG_PC == PCB_REG_PC, "PCB_REG_PC mismatch");
+#endif
+
+static void
+mipsfbsd_supply_pcb(struct regcache *regcache, CORE_ADDR pcb_addr)
+{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ size_t regsize = mips_isa_regsize (gdbarch);
+ gdb_byte buf[regsize * (FBSD_PCB_REG_PC + 1)];
+
+ /* Read the entire pcb_context[] array in one go. The pcb_context[]
+ array is after the pcb_regs member which is a trapframe. */
+ if (target_read_memory (pcb_addr + TRAPFRAME_WORDS * regsize, buf,
+ sizeof(buf)) != 0)
+ return;
+
+ regcache_raw_supply_unsigned (regcache, MIPS_ZERO_REGNUM, 0);
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM - 2,
+ buf + (regsize * FBSD_PCB_REG_S0));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM - 1,
+ buf + (regsize * FBSD_PCB_REG_S1));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_S2));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 1,
+ buf + (regsize * FBSD_PCB_REG_S3));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 2,
+ buf + (regsize * FBSD_PCB_REG_S4));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 3,
+ buf + (regsize * FBSD_PCB_REG_S5));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 4,
+ buf + (regsize * FBSD_PCB_REG_S6));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 5,
+ buf + (regsize * FBSD_PCB_REG_S7));
+ regcache_raw_supply (regcache, MIPS_SP_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_SP));
+ regcache_raw_supply (regcache, MIPS_S2_REGNUM + 6,
+ buf + (regsize * FBSD_PCB_REG_S8));
+ regcache_raw_supply (regcache, MIPS_RA_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_RA));
+ regcache_raw_supply (regcache, MIPS_PS_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_SR));
+ regcache_raw_supply (regcache, MIPS_GP_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_GP));
+ regcache_raw_supply (regcache, MIPS_EMBED_PC_REGNUM,
+ buf + (regsize * FBSD_PCB_REG_PC));
+}
+
+static struct trad_frame_cache *
+mipsfbsd_trapframe_cache (struct frame_info *this_frame, void **this_cache)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ size_t regsize = mips_isa_regsize (gdbarch);
+ struct trad_frame_cache *cache;
+ CORE_ADDR addr, func, pc, sp;
+ int regnum;
+
+ if (*this_cache != NULL)
+ return ((struct trad_frame_cache *)*this_cache);
+
+ cache = trad_frame_cache_zalloc (this_frame);
+ *this_cache = cache;
+
+ func = get_frame_func (this_frame);
+ sp = get_frame_register_signed (this_frame,
+ MIPS_SP_REGNUM + gdbarch_num_regs (gdbarch));
+
+ /* Skip over CALLFRAME_SIZ. */
+ addr = sp;
+ if (regsize == 8)
+ addr += regsize * 4;
+ else
+ addr += regsize * (4 + 2);
+
+ /* GPRs. Skip zero. */
+ addr += regsize;
+ for (regnum = MIPS_AT_REGNUM; regnum <= MIPS_RA_REGNUM; regnum++)
+ {
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+ }
+
+ regnum = MIPS_PS_REGNUM;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+
+ /* HI and LO. */
+ regnum = mips_regnum (gdbarch)->lo;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+ regnum = mips_regnum (gdbarch)->hi;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+
+ /* BADVADDR. */
+ regnum = mips_regnum (gdbarch)->badvaddr;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+
+ /* CAUSE. */
+ regnum = mips_regnum (gdbarch)->cause;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+ addr += regsize;
+
+ /* PC. */
+ regnum = mips_regnum (gdbarch)->pc;
+ trad_frame_set_reg_addr (cache,
+ regnum + gdbarch_num_regs (gdbarch),
+ addr);
+
+ trad_frame_set_id (cache, frame_id_build (sp + TRAPFRAME_WORDS * regsize,
+ func));
+ return cache;
+}
+
+static void
+mipsfbsd_trapframe_this_id (struct frame_info *this_frame,
+ void **this_cache, struct frame_id *this_id)
+{
+ struct trad_frame_cache *cache =
+ mipsfbsd_trapframe_cache (this_frame, this_cache);
+
+ trad_frame_get_id (cache, this_id);
+}
+
+static struct value *
+mipsfbsd_trapframe_prev_register (struct frame_info *this_frame,
+ void **this_cache, int regnum)
+{
+ struct trad_frame_cache *cache =
+ mipsfbsd_trapframe_cache (this_frame, this_cache);
+
+ return trad_frame_get_register (cache, this_frame, regnum);
+}
+
+static int
+mipsfbsd_trapframe_sniffer (const struct frame_unwind *self,
+ struct frame_info *this_frame,
+ void **this_prologue_cache)
+{
+ const char *name;
+
+ find_pc_partial_function (get_frame_func (this_frame), &name, NULL, NULL);
+ return (name && ((strcmp(name, "MipsKernIntr") == 0) ||
+ (strcmp(name, "MipsKernGenException") == 0) ||
+ (strcmp(name, "MipsTLBInvalidException") == 0)));
+}
+
+static const struct frame_unwind mipsfbsd_trapframe_unwind = {
+ SIGTRAMP_FRAME,
+ default_frame_unwind_stop_reason,
+ mipsfbsd_trapframe_this_id,
+ mipsfbsd_trapframe_prev_register,
+ NULL,
+ mipsfbsd_trapframe_sniffer
+};
+
+static void
+mipsfbsd_kernel_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
+{
+ enum mips_abi abi = mips_abi (gdbarch);
+
+ set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
+
+ switch (abi)
+ {
+ case MIPS_ABI_O32:
+ break;
+ case MIPS_ABI_N32:
+ set_gdbarch_long_double_bit (gdbarch, 128);
+ /* These floatformats should probably be renamed. MIPS uses
+ the same 128-bit IEEE floating point format that IA-64 uses,
+ except that the quiet/signalling NaN bit is reversed (GDB
+ does not distinguish between quiet and signalling NaNs). */
+ set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
+ break;
+ case MIPS_ABI_N64:
+ set_gdbarch_long_double_bit (gdbarch, 128);
+ /* These floatformats should probably be renamed. MIPS uses
+ the same 128-bit IEEE floating point format that IA-64 uses,
+ except that the quiet/signalling NaN bit is reversed (GDB
+ does not distinguish between quiet and signalling NaNs). */
+ set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
+ break;
+ }
+
+ frame_unwind_prepend_unwinder (gdbarch, &mipsfbsd_trapframe_unwind);
+
+ set_solib_ops (gdbarch, &kld_so_ops);
+
+ fbsd_vmcore_set_supply_pcb (gdbarch, mipsfbsd_supply_pcb);
+ fbsd_vmcore_set_cpu_pcb_addr (gdbarch, kgdb_trgt_stop_pcb);
+}
+
+void _initialize_mips_kgdb_tdep (void);
+
+void
+_initialize_mips_kgdb_tdep (void)
+{
+ gdbarch_register_osabi_sniffer(bfd_arch_mips,
+ bfd_target_elf_flavour,
+ fbsd_kernel_osabi_sniffer);
+ gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_FREEBSD_ELF_KERNEL,
+ mipsfbsd_kernel_init_abi);
+}
diff --git a/devel/gdb/files/kgdb/ppcfbsd-kern.c b/devel/gdb/files/kgdb/ppcfbsd-kern.c
index 082e8272eafd..ddf4e99e334b 100644
--- a/devel/gdb/files/kgdb/ppcfbsd-kern.c
+++ b/devel/gdb/files/kgdb/ppcfbsd-kern.c
@@ -58,7 +58,7 @@ ppcfbsd_supply_pcb(struct regcache *regcache, CORE_ADDR pcb_addr)
tdep = gdbarch_tdep (target_gdbarch());
- if (target_read_memory(pcb_addr, &pcb, sizeof(pcb)) != 0)
+ if (target_read_memory(pcb_addr, (gdb_byte *)&pcb, sizeof(pcb)) != 0)
memset(&pcb, 0, sizeof(pcb));
/*
diff --git a/devel/gdb/files/kgdb/sparc64fbsd-kern.c b/devel/gdb/files/kgdb/sparc64fbsd-kern.c
index 770e8e1521a2..b744534cbe30 100644
--- a/devel/gdb/files/kgdb/sparc64fbsd-kern.c
+++ b/devel/gdb/files/kgdb/sparc64fbsd-kern.c
@@ -55,7 +55,7 @@ sparc64fbsd_supply_pcb(struct regcache *regcache, CORE_ADDR pcb_addr)
{
struct pcb pcb;
- if (target_read_memory(pcb_addr, &pcb, sizeof(pcb)) != 0)
+ if (target_read_memory(pcb_addr, (gdb_byte *)&pcb, sizeof(pcb)) != 0)
memset(&pcb, 0, sizeof(pcb));
regcache_raw_supply(regcache, SPARC_SP_REGNUM, (char *)&pcb.pcb_sp);
@@ -252,14 +252,14 @@ kgdb_trgt_trapframe_prev_register(struct frame_info *next_frame,
ofs = (regnum - SPARC_L0_REGNUM) * 8;
*addrp = cache->sp + BIAS + ofs;
*lvalp = lval_memory;
- target_read_memory(*addrp, valuep, regsz);
+ target_read_memory(*addrp, (gdb_byte *)valuep, regsz);
}
return;
}
*addrp = cache->fp + ofs;
*lvalp = lval_memory;
- target_read_memory(*addrp, valuep, regsz);
+ target_read_memory(*addrp, (gdb_byte *)valuep, regsz);
}
static const struct frame_unwind kgdb_trgt_trapframe_unwind = {
diff --git a/devel/gdb/files/patch-gdb-fbsd-nat.c b/devel/gdb/files/patch-gdb-fbsd-nat.c
index 07a224e09d09..4b0915a7a11b 100644
--- a/devel/gdb/files/patch-gdb-fbsd-nat.c
+++ b/devel/gdb/files/patch-gdb-fbsd-nat.c
@@ -1,6 +1,16 @@
---- gdb/fbsd-nat.c.orig 2016-03-14 00:00:11.831889802 +0100
-+++ gdb/fbsd-nat.c 2016-03-14 00:04:35.906871361 +0100
-@@ -471,6 +471,14 @@
+--- gdb/fbsd-nat.c.orig 2016-08-01 17:50:20.000000000 +0200
++++ gdb/fbsd-nat.c 2016-12-14 23:23:39.467449000 +0100
+@@ -680,6 +680,9 @@
+ if (!ptid_match (tp->ptid, *filter))
+ return 0;
+
++ if (tp->state == THREAD_EXITED) {
++ return 0;
++ }
+ if (ptrace (PT_RESUME, ptid_get_lwp (tp->ptid), NULL, 0) == -1)
+ perror_with_name (("ptrace"));
+ return 0;
+@@ -710,6 +713,14 @@
ptid_get_tid (ptid));
if (ptid_lwp_p (ptid))
{
generated by cgit (git 2.34.1) at 2025-03-01 06:22:46 +0800