diff options
| author | zeising <zeising@FreeBSD.org> | 2015-10-04 20:17:59 +0800 |
|---|---|---|
| committer | zeising <zeising@FreeBSD.org> | 2015-10-04 20:17:59 +0800 |
| commit | 519c564cccab2f560ec9c2bafeba5540837ea419 (patch) | |
| tree | 61382fd89bc22432d00b63c3e0806bc29f5df952 /cad/iverilog | |
| parent | bf55d0bca8cbb46f33f9b394edf938af4521967a (diff) | |
| download | freebsd-ports-gnome-519c564cccab2f560ec9c2bafeba5540837ea419.tar.gz freebsd-ports-gnome-519c564cccab2f560ec9c2bafeba5540837ea419.tar.zst freebsd-ports-gnome-519c564cccab2f560ec9c2bafeba5540837ea419.zip | |
Update to 10.0
Committed from: EuroBSDCon 2015
Diffstat (limited to 'cad/iverilog')
| -rw-r--r-- | cad/iverilog/Makefile | 5 | ||||
| -rw-r--r-- | cad/iverilog/distinfo | 4 | ||||
| -rw-r--r-- | cad/iverilog/files/patch-load_module.cc | 8 | ||||
| -rw-r--r-- | cad/iverilog/pkg-plist | 19 |
4 files changed, 27 insertions, 9 deletions
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile index 82094e496e1a..281ffe8288f0 100644 --- a/cad/iverilog/Makefile +++ b/cad/iverilog/Makefile @@ -2,10 +2,9 @@ # $FreeBSD$ PORTNAME= iverilog -PORTVERSION= 0.9.7 +PORTVERSION= 10.0 CATEGORIES= cad -MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]$,,}/ \ - ftp://ftp.geda.seul.org/pub/geda/dist/ +MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]$,,}/ DISTNAME= verilog-${PORTVERSION} MAINTAINER= zeising@FreeBSD.org diff --git a/cad/iverilog/distinfo b/cad/iverilog/distinfo index fe07c67f2467..edcd65ff1dd1 100644 --- a/cad/iverilog/distinfo +++ b/cad/iverilog/distinfo @@ -1,2 +1,2 @@ -SHA256 (verilog-0.9.7.tar.gz) = 7a5e72e17bfb4c3a59264d8f3cc4e70a7c49c1307173348fdd44e079388e7454 -SIZE (verilog-0.9.7.tar.gz) = 1238088 +SHA256 (verilog-10.0.tar.gz) = 179f09afbafb951bea28c9001b06ed8b9b2e54181092d48e343cb20f436b1185 +SIZE (verilog-10.0.tar.gz) = 1683102 diff --git a/cad/iverilog/files/patch-load_module.cc b/cad/iverilog/files/patch-load_module.cc index e48d409e832a..4fb17b221540 100644 --- a/cad/iverilog/files/patch-load_module.cc +++ b/cad/iverilog/files/patch-load_module.cc @@ -1,10 +1,10 @@ ---- load_module.cc.orig Thu Jul 17 20:49:38 2003 -+++ load_module.cc Thu Jul 17 20:49:51 2003 -@@ -24,6 +24,7 @@ +--- load_module.cc.orig 2015-08-23 21:41:41 UTC ++++ load_module.cc +@@ -21,6 +21,7 @@ # include "util.h" # include "parse_api.h" # include "compiler.h" +# include <assert.h> # include <iostream> # include <map> - # include <string> + # include <cstdlib> diff --git a/cad/iverilog/pkg-plist b/cad/iverilog/pkg-plist index 0c34ee5c2c12..8e1272dbb2b6 100644 --- a/cad/iverilog/pkg-plist +++ b/cad/iverilog/pkg-plist @@ -4,8 +4,12 @@ bin/vvp include/iverilog/_pli_types.h include/iverilog/acc_user.h include/iverilog/ivl_target.h +include/iverilog/sv_vpi_user.h include/iverilog/veriuser.h include/iverilog/vpi_user.h +lib/ivl/blif-s.conf +lib/ivl/blif.conf +lib/ivl/blif.tgt lib/ivl/cadpli.vpl lib/ivl/include/constants.vams lib/ivl/include/disciplines.vams @@ -14,18 +18,33 @@ lib/ivl/ivlpp lib/ivl/null-s.conf lib/ivl/null.conf lib/ivl/null.tgt +lib/ivl/pcb-s.conf +lib/ivl/pcb.conf +lib/ivl/pcb.tgt +lib/ivl/sizer-s.conf +lib/ivl/sizer.conf +lib/ivl/sizer.tgt lib/ivl/stub-s.conf lib/ivl/stub.conf lib/ivl/stub.tgt lib/ivl/system.sft lib/ivl/system.vpi +lib/ivl/vlog95-s.conf +lib/ivl/vlog95.conf +lib/ivl/vlog95.tgt +lib/ivl/vpi_debug.vpi lib/ivl/v2005_math.sft lib/ivl/v2005_math.vpi +lib/ivl/v2009.sft +lib/ivl/v2009.vpi lib/ivl/va_math.sft lib/ivl/va_math.vpi lib/ivl/vhdl-s.conf +lib/ivl/vhdl_sys.sft +lib/ivl/vhdl_sys.vpi lib/ivl/vhdl.conf lib/ivl/vhdl.tgt +lib/ivl/vhdlpp lib/ivl/vvp-s.conf lib/ivl/vvp.conf lib/ivl/vvp.tgt |