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authormiwi <miwi@FreeBSD.org>2012-08-05 12:57:54 +0800
committermiwi <miwi@FreeBSD.org>2012-08-05 12:57:54 +0800
commit4d7392cfa7eea6e032b48cddbe0be198731fb5e8 (patch)
tree87d80d05509f294718a80e9f5ee4b96ad1127024 /cad
parentd16859b9e3e24e96decdaa311dc0b104fa8d8c44 (diff)
downloadfreebsd-ports-gnome-4d7392cfa7eea6e032b48cddbe0be198731fb5e8.tar.gz
freebsd-ports-gnome-4d7392cfa7eea6e032b48cddbe0be198731fb5e8.tar.zst
freebsd-ports-gnome-4d7392cfa7eea6e032b48cddbe0be198731fb5e8.zip
- Update to 801
PR: 170139 Submitted by: Ports Fury
Diffstat (limited to 'cad')
-rw-r--r--cad/verilog-mode.el/Makefile24
-rw-r--r--cad/verilog-mode.el/distinfo4
-rw-r--r--cad/verilog-mode.el/pkg-descr6
-rw-r--r--cad/verilog-mode.el/pkg-plist6
4 files changed, 18 insertions, 22 deletions
diff --git a/cad/verilog-mode.el/Makefile b/cad/verilog-mode.el/Makefile
index 6bfdfadb33ed..78d4d7c0460e 100644
--- a/cad/verilog-mode.el/Makefile
+++ b/cad/verilog-mode.el/Makefile
@@ -6,28 +6,30 @@
#
PORTNAME= verilog-mode.el
-PORTVERSION= 790
+PORTVERSION= 801
CATEGORIES= cad elisp
MASTER_SITES= http://www.veripool.org/ftp/
-DISTNAME= verilog-mode-${PORTVERSION}.el
+DISTNAME= ${PORTNAME:R}-${PORTVERSION}.${PORTNAME:E}
EXTRACT_SUFX= .gz
MAINTAINER= ports@FreeBSD.org
COMMENT= Emacs lisp modules for the Verilog language
+LICENSE= GPLv3 # (or later)
+
+EXTRACT_AFTER_ARGS= > ${PORTNAME}
+
+NO_WRKSUBDIR= yes
NO_BUILD= yes
-EXTRACT_AFTER_ARGS= > ${ELFILE}
-ELFILE= verilog-mode.el
-EMACSLISPDIR= ${PREFIX}/share/emacs/site-lisp
-XEMACSLISPDIR= ${PREFIX}/lib/xemacs/site-lisp
+USE_EMACS= yes
+EMACS_NO_BUILD_DEPENDS= yes
+
+PLIST_FILES= ${EMACS_SITE_LISPDIR}/${PORTNAME}
do-install:
- ${MKDIR} ${DATADIR}/
- ${INSTALL_DATA} ${WRKDIR}/${ELFILE} ${DATADIR}/
- ${MKDIR} ${XEMACSLISPDIR}
- ${LN} -sf ${DATADIR}/${ELFILE} ${EMACSLISPDIR}/
- ${LN} -sf ${DATADIR}/${ELFILE} ${XEMACSLISPDIR}/
+ @${MKDIR} ${PREFIX}/${EMACS_SITE_LISPDIR}
+ ${INSTALL_DATA} ${WRKSRC}/${PORTNAME} ${PREFIX}/${EMACS_SITE_LISPDIR}
@${CAT} ${PKGMESSAGE}
.include <bsd.port.mk>
diff --git a/cad/verilog-mode.el/distinfo b/cad/verilog-mode.el/distinfo
index f61d1212bea3..cf5f8f4b0d5d 100644
--- a/cad/verilog-mode.el/distinfo
+++ b/cad/verilog-mode.el/distinfo
@@ -1,2 +1,2 @@
-SHA256 (verilog-mode-790.el.gz) = eca9dd11500dce962b51a42e7c89a0dc414bea3a3dd79a2daf94286c8ad3d729
-SIZE (verilog-mode-790.el.gz) = 114783
+SHA256 (verilog-mode-801.el.gz) = 38004b5b222c6bbbe743af629cbbfc2a8fbc5706567996f813d73f708fe61e16
+SIZE (verilog-mode-801.el.gz) = 115719
diff --git a/cad/verilog-mode.el/pkg-descr b/cad/verilog-mode.el/pkg-descr
index 49316f00dda8..204e0d263792 100644
--- a/cad/verilog-mode.el/pkg-descr
+++ b/cad/verilog-mode.el/pkg-descr
@@ -2,9 +2,9 @@ Verilog-mode.el is a Verilog mode for Emacs which provides context-sensitive
highlighting, auto indenting, and provides macro expansion capabilities to
greatly reduce Verilog coding time.
-Recent versions allow you to insert AUTOS in non-AUTO designs, so IP interconnect
-can be easily modified. You can also expand Verilog-2001 ".*" instantiations, to
-see what ports will be connected by simulators.
+Recent versions allow you to insert AUTOS in non-AUTO designs, so IP
+interconnect can be easily modified. You can also expand Verilog-2001 ".*"
+instantiations, to see what ports will be connected by simulators.
Author: Michael McNamara <mac@verilog.com>, Wilson Snyder <wsnyder@wsnyder.org>
WWW: http://www.veripool.org/wiki/verilog-mode
diff --git a/cad/verilog-mode.el/pkg-plist b/cad/verilog-mode.el/pkg-plist
index 597315d46558..e69de29bb2d1 100644
--- a/cad/verilog-mode.el/pkg-plist
+++ b/cad/verilog-mode.el/pkg-plist
@@ -1,6 +0,0 @@
-share/emacs/site-lisp/verilog-mode.el
-lib/xemacs/site-lisp/verilog-mode.el
-%%DATADIR%%/verilog-mode.el
-@dirrmtry lib/xemacs/site-lisp
-@dirrmtry lib/xemacs
-@dirrm %%DATADIR%%