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author | tg <tg@FreeBSD.org> | 1996-10-16 14:53:54 +0800 |
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committer | tg <tg@FreeBSD.org> | 1996-10-16 14:53:54 +0800 |
commit | 519628fd3835be4552e9f37b9d25fa7cfab4d3d2 (patch) | |
tree | d12f7d58568bcbb3056b391d592445646018ab34 /cad | |
parent | c5cc7995c7fa211bb5d7fe72c179c34bfa60dfa2 (diff) | |
download | freebsd-ports-gnome-519628fd3835be4552e9f37b9d25fa7cfab4d3d2.tar.gz freebsd-ports-gnome-519628fd3835be4552e9f37b9d25fa7cfab4d3d2.tar.zst freebsd-ports-gnome-519628fd3835be4552e9f37b9d25fa7cfab4d3d2.zip |
Trim DESCR to less than a screenful.
Diffstat (limited to 'cad')
-rw-r--r-- | cad/acs/pkg-descr | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/cad/acs/pkg-descr b/cad/acs/pkg-descr index efc0bfdaf161..a74d21b0a257 100644 --- a/cad/acs/pkg-descr +++ b/cad/acs/pkg-descr @@ -17,32 +17,3 @@ bipolar design. In batch mode it is mostly Spice compatible, so it is often possible to use the same file for both ACS and Spice. - -The analog simulation is based on traditional nodal analysis with -iteration by Newton's method and LU decomposition. An event queue -and incremental matrix update speed up the solution for large -circuits. - -It also has digital devices for mixed signal simulation. The -digital devices may be implemented as either analog subcircuits or -as true digital models. The simulator will automatically determine -which to use. Networks of digital devices are simulated as digital, -with no conversions to analog between gates. This results in -digital circuits being simulated faster than on a typical analog -simulator, even with behavioral models. The digital mode is -experimental and needs work. There will be substantial improvements -in future releases. - -ACS also has a simple behavioral modeling language that allows -simple behavioral descriptions of most components including capacitors -and inductors. Unfortunately, it is not well documented. - -ACS uses an object oriented approach to modeling. Complex models -like MOSFETS are made of simpler ones like resistors, capacitors, -diodes, and any other models that may already exist. The model -designer does not need to worry about details like convergence -checking, bypass checking, integration, or how the new device plugs -into the solution matrix because these are already taken care of -by the basic models. This results in a dramatic improvement in -the time it takes a researcher or model designer to install a new -model, compared to Spice. |