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| author | eadler <eadler@FreeBSD.org> | 2013-03-29 00:28:59 +0800 |
|---|---|---|
| committer | eadler <eadler@FreeBSD.org> | 2013-03-29 00:28:59 +0800 |
| commit | 3ed7e5832a752d963b037d8017ec4d3a42ea9bfd (patch) | |
| tree | 02d4462d3bb1265765e1fe1d3f6bc4b0ac3c771d /cad | |
| parent | deec7fa8ba51a5c6b12c0efc27422d190e4c73ff (diff) | |
| download | freebsd-ports-gnome-3ed7e5832a752d963b037d8017ec4d3a42ea9bfd.tar.gz freebsd-ports-gnome-3ed7e5832a752d963b037d8017ec4d3a42ea9bfd.tar.zst freebsd-ports-gnome-3ed7e5832a752d963b037d8017ec4d3a42ea9bfd.zip | |
Style: tab -> space.
Most contributors copy an existing port when writing their own so reduce the number of bad examples in the tree.
Diffstat (limited to 'cad')
| -rw-r--r-- | cad/adms/pkg-descr | 2 | ||||
| -rw-r--r-- | cad/jspice3/pkg-descr | 2 | ||||
| -rw-r--r-- | cad/spice/pkg-descr | 2 | ||||
| -rw-r--r-- | cad/tochnog/pkg-descr | 2 | ||||
| -rw-r--r-- | cad/varkon/pkg-descr | 2 | ||||
| -rw-r--r-- | cad/verilog-mode.el/pkg-descr | 2 | ||||
| -rw-r--r-- | cad/z88/pkg-descr | 2 |
7 files changed, 7 insertions, 7 deletions
diff --git a/cad/adms/pkg-descr b/cad/adms/pkg-descr index 76a72ec670a4..52582ea135b5 100644 --- a/cad/adms/pkg-descr +++ b/cad/adms/pkg-descr @@ -2,4 +2,4 @@ ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators. -WWW: http://mot-adms.sourceforge.net/ +WWW: http://mot-adms.sourceforge.net/ diff --git a/cad/jspice3/pkg-descr b/cad/jspice3/pkg-descr index a79ece1ceca5..da0f153e04b7 100644 --- a/cad/jspice3/pkg-descr +++ b/cad/jspice3/pkg-descr @@ -13,4 +13,4 @@ holds its own in functionality. A significantly enhanced output plotting capability is provided, and Jspice3 has enhanced script interpretation capability. -WWW: http://www.wrcad.com/jspice3.html +WWW: http://www.wrcad.com/jspice3.html diff --git a/cad/spice/pkg-descr b/cad/spice/pkg-descr index 932b49edb9a4..582c9e23f8f8 100644 --- a/cad/spice/pkg-descr +++ b/cad/spice/pkg-descr @@ -11,4 +11,4 @@ and the level 2 JFET model are courtesy from the Macquarie University. Online documentation at: -WWW: http://bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/ +WWW: http://bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/ diff --git a/cad/tochnog/pkg-descr b/cad/tochnog/pkg-descr index e3fc41dcadca..b7c176a0b5e6 100644 --- a/cad/tochnog/pkg-descr +++ b/cad/tochnog/pkg-descr @@ -12,4 +12,4 @@ be printed or plotted using gnuplot/plotmtv, CalculiX or gmsh. TOCHNOG supports a choice of description frames including Lagrangian, Eulerian and arbitrary Eulerian-Lagrangian (AEL). -WWW: http://tochnog.sourceforge.net/ +WWW: http://tochnog.sourceforge.net/ diff --git a/cad/varkon/pkg-descr b/cad/varkon/pkg-descr index f247502f5231..b4a6da2352a2 100644 --- a/cad/varkon/pkg-descr +++ b/cad/varkon/pkg-descr @@ -9,4 +9,4 @@ Linkoping in Sweden during 1984-86 under the leadership of Dr. Johan Kjellander who was then the president of Microform AB. From 1986 the system was owned, marketed and further developed by Microform AB. -WWW: http://varkon.sourceforge.net/ +WWW: http://varkon.sourceforge.net/ diff --git a/cad/verilog-mode.el/pkg-descr b/cad/verilog-mode.el/pkg-descr index 204e0d263792..3b1cd432f249 100644 --- a/cad/verilog-mode.el/pkg-descr +++ b/cad/verilog-mode.el/pkg-descr @@ -7,4 +7,4 @@ interconnect can be easily modified. You can also expand Verilog-2001 ".*" instantiations, to see what ports will be connected by simulators. Author: Michael McNamara <mac@verilog.com>, Wilson Snyder <wsnyder@wsnyder.org> -WWW: http://www.veripool.org/wiki/verilog-mode +WWW: http://www.veripool.org/wiki/verilog-mode diff --git a/cad/z88/pkg-descr b/cad/z88/pkg-descr index eaebe313cea1..232677f2a1d7 100644 --- a/cad/z88/pkg-descr +++ b/cad/z88/pkg-descr @@ -18,4 +18,4 @@ FEATURES # The import of COSMOS and NASTRAN files from Pro/ENGINEER (with option Pro/MECHANICA) is possible. -WWW: http://www.z88.org/ +WWW: http://www.z88.org/ |