Add support for ATtiny88, ATmega32HVB, ATmega1284P.

Fix support for AT90USB82/162, move them into "avr35" architecture.
Add support for the OS_main and OS_task attributes.

Integrate some more bugfixes from the WinAVR patch list.

10 files changed, 910 insertions, 77 deletions

diff --git a/devel/avr-gcc/Makefile b/devel/avr-gcc/Makefile
index 4b100753c035..494248a2a117 100644
--- a/devel/avr-gcc/Makefile
+++ b/devel/avr-gcc/Makefile
@@ -7,6 +7,7 @@
 
 PORTNAME=	gcc
 PORTVERSION=	4.2.2
+PORTREVISION=	1
 CATEGORIES=	devel
 MASTER_SITES=	${MASTER_SITE_GCC}
 MASTER_SITES+=	http://people.freebsd.org/~joerg/:local
diff --git a/devel/avr-gcc/files/patch-bug11259 b/devel/avr-gcc/files/patch-bug11259
new file mode 100644
index 000000000000..0ef47881fe62
--- /dev/null
+++ b/devel/avr-gcc/files/patch-bug11259
@@ -0,0 +1,322 @@
+--- gcc/config/avr/avr.md.orig	2007-09-01 19:28:30.000000000 +0400
++++ gcc/config/avr/avr.md	2007-11-08 02:37:48.828125000 +0300
+@@ -39,21 +39,22 @@
+ 
+ (define_constants
+   [(REG_X	26)
+    (REG_Y	28)
+    (REG_Z	30)
+    (REG_W	24)
+    (REG_SP	32)
+    (TMP_REGNO	0)	; temporary register r0
+    (ZERO_REGNO	1)	; zero register r1
+    (UNSPEC_STRLEN	0)
+-   (UNSPEC_INDEX_JMP	1)])
++   (UNSPEC_INDEX_JMP	1)
++   (UNSPEC_SWAP		4)])
+ 
+ (include "predicates.md")
+ (include "constraints.md")
+   
+ ;; Condition code settings.
+ (define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber"
+   (const_string "none"))
+ 
+ (define_attr "type" "branch,branch1,arith,xcall"
+   (const_string "arith"))
+@@ -1044,20 +1045,33 @@
+       return (AS2 (andi, %A0,lo8(%2))  CR_TAB
+               AS2 (andi, %B0,hi8(%2)) CR_TAB
+ 	      AS2 (andi, %C0,hlo8(%2)) CR_TAB
+ 	      AS2 (andi, %D0,hhi8(%2)));
+     }
+   return \"bug\";
+ }"
+   [(set_attr "length" "4,4")
+    (set_attr "cc" "set_n,set_n")])
+ 
++(define_peephole2 ; andi
++  [(set (match_operand:QI 0 "d_register_operand" "")
++        (and:QI (match_dup 0)
++	        (match_operand:QI 1 "const_int_operand" "")))
++   (set (match_dup 0)
++        (and:QI (match_dup 0)
++	        (match_operand:QI 2 "const_int_operand" "")))]
++  ""
++  [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))]
++  {
++    operands[1] = GEN_INT (INTVAL (operands[1]) & INTVAL (operands[2]));
++  })
++
+ ;;|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
+ ;; ior
+ 
+ (define_insn "iorqi3"
+   [(set (match_operand:QI 0 "register_operand" "=r,d")
+         (ior:QI (match_operand:QI 1 "register_operand" "%0,0")
+                 (match_operand:QI 2 "nonmemory_operand" "r,i")))]
+   ""
+   "@
+ 	or %0,%2
+@@ -1172,24 +1186,71 @@
+         (xor:SI (match_operand:SI 1 "register_operand" "%0")
+                 (match_operand:SI 2 "register_operand" "r")))]
+   ""
+   "eor %0,%2
+ 	eor %B0,%B2
+ 	eor %C0,%C2
+ 	eor %D0,%D2"
+   [(set_attr "length" "4")
+    (set_attr "cc" "set_n")])
+ 
++;; swap
++
++(define_insn "*swap"
++  [(set (match_operand:QI 0 "register_operand" "=r")
++	(unspec:QI [(match_operand:QI 1 "register_operand" "0")]
++		   UNSPEC_SWAP))]
++  ""
++  "swap %0"
++  [(set_attr "length" "1")
++   (set_attr "cc" "none")])
++
+ ;;<< << << << << << << << << << << << << << << << << << << << << << << << << <<
+ ;; arithmetic shift left
+ 
+-(define_insn "ashlqi3"
++(define_expand "ashlqi3"
++  [(set (match_operand:QI 0 "register_operand"            "")
++	(ashift:QI (match_operand:QI 1 "register_operand" "")
++		   (match_operand:QI 2 "general_operand"  "")))]
++  ""
++  "")
++
++(define_split ; ashlqi3_const4
++  [(set (match_operand:QI 0 "d_register_operand"            "")
++	(ashift:QI (match_operand:QI 1 "d_register_operand" "")
++		   (const_int 4)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int -16)))]
++  "")
++
++(define_split ; ashlqi3_const5
++  [(set (match_operand:QI 0 "d_register_operand"            "")
++	(ashift:QI (match_operand:QI 1 "d_register_operand" "")
++		   (const_int 5)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int -32)))]
++  "")
++
++(define_split ; ashlqi3_const6
++  [(set (match_operand:QI 0 "d_register_operand"            "")
++	(ashift:QI (match_operand:QI 1 "d_register_operand" "")
++		   (const_int 6)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int -64)))]
++  "")
++
++(define_insn "*ashlqi3"
+   [(set (match_operand:QI 0 "register_operand"           "=r,r,r,r,!d,r,r")
+ 	(ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
+ 		   (match_operand:QI 2 "general_operand"  "r,L,P,K,n,n,Qm")))]
+   ""
+   "* return ashlqi3_out (insn, operands, NULL);"
+   [(set_attr "length" "5,0,1,2,4,6,9")
+    (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
+ 
+ (define_insn "ashlhi3"
+   [(set (match_operand:HI 0 "register_operand"           "=r,r,r,r,r,r,r")
+@@ -1205,20 +1266,61 @@
+ 	(ashift:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
+ 		   (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
+   ""
+   "* return ashlsi3_out (insn, operands, NULL);"
+   [(set_attr "length" "8,0,4,4,8,10,12")
+    (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
+ 
+ ;; Optimize if a scratch register from LD_REGS happens to be available.
+ 
+ (define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(ashift:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 4)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 2) (const_int -16))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(ashift:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 5)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
++   (set (match_dup 2) (const_int -32))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(ashift:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 6)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
++   (set (match_dup 2) (const_int -64))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
+   [(match_scratch:QI 3 "d")
+    (set (match_operand:HI 0 "register_operand" "")
+ 	(ashift:HI (match_operand:HI 1 "register_operand" "")
+ 		   (match_operand:QI 2 "const_int_operand" "")))]
+   ""
+   [(parallel [(set (match_dup 0) (ashift:HI (match_dup 1) (match_dup 2)))
+ 	      (clobber (match_dup 3))])]
+   "if (!avr_peep2_scratch_safe (operands[3]))
+      FAIL;")
+ 
+@@ -1323,21 +1425,63 @@
+ 		     (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
+    (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
+   "reload_completed"
+   "* return ashrsi3_out (insn, operands, NULL);"
+   [(set_attr "length" "0,4,4,10")
+    (set_attr "cc" "none,clobber,set_n,clobber")])
+ 
+ ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
+ ;; logical shift right
+ 
+-(define_insn "lshrqi3"
++(define_expand "lshrqi3"
++  [(set (match_operand:QI 0 "register_operand"              "")
++	(lshiftrt:QI (match_operand:QI 1 "register_operand" "")
++		     (match_operand:QI 2 "general_operand"  "")))]
++  ""
++  "")
++
++(define_insn_and_split "*lshrqi3_const4"
++  [(set (match_operand:QI 0 "d_register_operand"             "=d")
++	(lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++		     (const_int 4)))]
++  ""
++  "#"
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int 15)))]
++  "")
++
++(define_insn_and_split "*lshrqi3_const5"
++  [(set (match_operand:QI 0 "d_register_operand"             "=d")
++	(lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++		     (const_int 5)))]
++  ""
++  "#"
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int 7)))]
++  "")
++
++(define_insn_and_split "*lshrqi3_const6"
++  [(set (match_operand:QI 0 "d_register_operand"             "=d")
++	(lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++		     (const_int 6)))]
++  ""
++  "#"
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
++   (set (match_dup 0) (and:QI (match_dup 0) (const_int 3)))]
++  "")
++
++(define_insn "*lshrqi3"
+   [(set (match_operand:QI 0 "register_operand"             "=r,r,r,r,!d,r,r")
+ 	(lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
+ 		     (match_operand:QI 2 "general_operand"  "r,L,P,K,n,n,Qm")))]
+   ""
+   "* return lshrqi3_out (insn, operands, NULL);"
+   [(set_attr "length" "5,0,1,2,4,6,9")
+    (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
+ 
+ (define_insn "lshrhi3"
+   [(set (match_operand:HI 0 "register_operand"             "=r,r,r,r,r,r,r")
+@@ -1353,20 +1497,61 @@
+ 	(lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
+ 		     (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
+   ""
+   "* return lshrsi3_out (insn, operands, NULL);"
+   [(set_attr "length" "8,0,4,4,8,10,12")
+    (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")])
+ 
+ ;; Optimize if a scratch register from LD_REGS happens to be available.
+ 
+ (define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 4)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 2) (const_int 15))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 5)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
++   (set (match_dup 2) (const_int 7))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
++  [(match_scratch:QI 2 "d")
++   (set (match_operand:QI 0 "l_register_operand" "")
++	(lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
++		     (const_int 6)))]
++  ""
++  [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++   (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
++   (set (match_dup 2) (const_int 3))
++   (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++   (clobber (match_dup 2))]
++  "if (!avr_peep2_scratch_safe (operands[2]))
++     FAIL;")
++
++(define_peephole2
+   [(match_scratch:QI 3 "d")
+    (set (match_operand:HI 0 "register_operand" "")
+ 	(lshiftrt:HI (match_operand:HI 1 "register_operand" "")
+ 		     (match_operand:QI 2 "const_int_operand" "")))]
+   ""
+   [(parallel [(set (match_dup 0) (lshiftrt:HI (match_dup 1) (match_dup 2)))
+ 	      (clobber (match_dup 3))])]
+   "if (!avr_peep2_scratch_safe (operands[3]))
+      FAIL;")
+ 
diff --git a/devel/avr-gcc/files/patch-bug30243 b/devel/avr-gcc/files/patch-bug30243
new file mode 100644
index 000000000000..dcfa43dd6b66
--- /dev/null
+++ b/devel/avr-gcc/files/patch-bug30243
@@ -0,0 +1,14 @@
+Fix for GCC bug #30243.
+Index: gcc/builtins.c
+===================================================================
+--- gcc/builtins.c	(revision 126457)
++++ gcc/builtins.c	(working copy)
+@@ -5664,7 +5664,7 @@
+ 	  lo = 0;
+ 	}
+ 
+-      if (imode != rmode)
++      if (imode > rmode)
+ 	temp = gen_lowpart (rmode, temp);
+       temp = expand_binop (rmode, and_optab, temp,
+ 			   immed_double_const (lo, hi, rmode),
diff --git a/devel/avr-gcc/files/patch-constraint-desc b/devel/avr-gcc/files/patch-constraint-desc
new file mode 100644
index 000000000000..b8be9478a4b6
--- /dev/null
+++ b/devel/avr-gcc/files/patch-constraint-desc
@@ -0,0 +1,33 @@
+
+2007-07-03 Eric Weddington  <eweddington@cso.atmel.com>
+
+	* config/avr/constraints.md (define_memory_constraint "Q"): Fix
+	the constraint description.
+	* doc/md.texi: Update documentation of AVR constraints.
+
+=======================================
+--- gcc/config/avr/constraints.md.old	2007-05-19 04:59:17.000000000 -0600
++++ gcc/config/avr/constraints.md	2007-07-03 14:47:28.007933000 -0600
+@@ -105,6 +105,6 @@
+        (match_test "ival >= -6 && ival <= 5")))
+        
+ (define_memory_constraint "Q"
+-  "A memory address based on X or Y pointer with displacement."
++  "A memory address based on Y or Z pointer with displacement."
+   (and (match_code "mem")
+        (match_test "extra_constraint_Q (op)")))
+--- gcc/doc/md.texi.old	2007-05-28 19:12:58.000000000 -0600
++++ gcc/doc/md.texi	2007-07-03 16:56:26.157051800 -0600
+@@ -1742,6 +1742,12 @@ Constant integer 1
+ 
+ @item G
+ A floating point constant 0.0
++
++@item R
++Integer constant in the range -6 @dots{} 5.
++
++@item Q
++A memory address based on Y or Z pointer with displacement.
+ @end table
+ 
+ @item CRX Architecture---@file{config/crx/crx.h}
diff --git a/devel/avr-gcc/files/patch-doc-progmem b/devel/avr-gcc/files/patch-doc-progmem
new file mode 100644
index 000000000000..858a7fbc8245
--- /dev/null
+++ b/devel/avr-gcc/files/patch-doc-progmem
@@ -0,0 +1,21 @@
+Patch to document the AVR progmem attribute.
+===========================================
+--- gcc/doc/extend.texi.old	2007-07-17 18:32:37.390625000 -0600
++++ gcc/doc/extend.texi	2007-07-18 07:59:47.218750000 -0600
+@@ -3623,6 +3623,16 @@ placed in either the @code{.bss_below100
+ 
+ @end table
+ 
++@subsection AVR Variable Attributes
++
++@table @code
++@item progmem
++@cindex @code{progmem} variable attribute
++The @code{progmem} attribute is used on the AVR to place data in the Program
++Memory address space. The AVR is a Harvard Architecture processor and data
++normally resides in the Data Memory address space.
++@end table
++
+ @node Type Attributes
+ @section Specifying Attributes of Types
+ @cindex attribute of types
diff --git a/devel/avr-gcc/files/patch-newdevices b/devel/avr-gcc/files/patch-newdevices
index 46064854b7ef..d8cec277e5fa 100644
--- a/devel/avr-gcc/files/patch-newdevices
+++ b/devel/avr-gcc/files/patch-newdevices
@@ -1,15 +1,40 @@
 --- gcc/config/avr/avr.c.orig	Sat Sep  1 17:28:30 2007
-+++ gcc/config/avr/avr.c	Sun Oct 28 00:00:51 2007
-@@ -204,6 +204,8 @@
++++ gcc/config/avr/avr.c	Wed Dec 19 14:02:11 2007
+@@ -143,6 +143,7 @@
+   { 0, 0, 0, 0, "__AVR_ARCH__=2" },
+   { 0, 0, 0, 1, "__AVR_ARCH__=25"},
+   { 0, 0, 1, 0, "__AVR_ARCH__=3" },
++  { 0, 0, 1, 1, "__AVR_ARCH__=35"},
+   { 0, 1, 0, 1, "__AVR_ARCH__=4" },
+   { 0, 1, 1, 1, "__AVR_ARCH__=5" }
+ };
+@@ -157,6 +158,7 @@
+   ARCH_AVR2,
+   ARCH_AVR25,
+   ARCH_AVR3,
++  ARCH_AVR35,
+   ARCH_AVR4,
+   ARCH_AVR5
+ };
+@@ -204,6 +206,9 @@
    { "attiny261",    ARCH_AVR25, "__AVR_ATtiny261__" },
    { "attiny461",    ARCH_AVR25, "__AVR_ATtiny461__" },
    { "attiny861",    ARCH_AVR25, "__AVR_ATtiny861__" },
 +  { "attiny43u",    ARCH_AVR25, "__AVR_ATtiny43U__" },
 +  { "attiny48",     ARCH_AVR25, "__AVR_ATtiny48__" },
++  { "attiny88",     ARCH_AVR25, "__AVR_ATtiny88__" },
    { "at86rf401",    ARCH_AVR25, "__AVR_AT86RF401__" },
      /* Classic, > 8K.  */
    { "avr3",         ARCH_AVR3, NULL },
-@@ -216,13 +218,17 @@
+@@ -212,17 +217,25 @@
+   { "at43usb320",   ARCH_AVR3, "__AVR_AT43USB320__" },
+   { "at43usb355",   ARCH_AVR3, "__AVR_AT43USB355__" },
+   { "at76c711",     ARCH_AVR3, "__AVR_AT76C711__" },
++  /* Classic + MOVW + JMP/CALL.  */
++  { "avr35",        ARCH_AVR35, NULL },
++  { "at90usb82",    ARCH_AVR35, "__AVR_AT90USB82__" },
++  { "at90usb162",   ARCH_AVR35, "__AVR_AT90USB162__" },
+     /* Enhanced, <= 8K.  */
    { "avr4",         ARCH_AVR4, NULL },
    { "atmega8",      ARCH_AVR4, "__AVR_ATmega8__" },
    { "atmega48",     ARCH_AVR4, "__AVR_ATmega48__" },
@@ -27,7 +52,7 @@
      /* Enhanced, > 8K.  */
    { "avr5",         ARCH_AVR5, NULL },
    { "atmega16",     ARCH_AVR5, "__AVR_ATmega16__" },
-@@ -233,6 +239,7 @@
+@@ -233,6 +246,7 @@
    { "atmega165",    ARCH_AVR5, "__AVR_ATmega165__" },
    { "atmega165p",   ARCH_AVR5, "__AVR_ATmega165P__" },
    { "atmega168",    ARCH_AVR5, "__AVR_ATmega168__" },
@@ -35,7 +60,7 @@
    { "atmega169",    ARCH_AVR5, "__AVR_ATmega169__" },
    { "atmega169p",   ARCH_AVR5, "__AVR_ATmega169P__" },
    { "atmega32",     ARCH_AVR5, "__AVR_ATmega32__" },
-@@ -242,6 +249,7 @@
+@@ -242,10 +256,12 @@
    { "atmega325p",   ARCH_AVR5, "__AVR_ATmega325P__" },
    { "atmega3250",   ARCH_AVR5, "__AVR_ATmega3250__" },
    { "atmega3250p",  ARCH_AVR5, "__AVR_ATmega3250P__" },
@@ -43,29 +68,55 @@
    { "atmega329",    ARCH_AVR5, "__AVR_ATmega329__" },
    { "atmega329p",   ARCH_AVR5, "__AVR_ATmega329P__" },
    { "atmega3290",   ARCH_AVR5, "__AVR_ATmega3290__" },
-@@ -262,6 +270,8 @@
+   { "atmega3290p",  ARCH_AVR5, "__AVR_ATmega3290P__" },
++  { "atmega32hvb",  ARCH_AVR5, "__AVR_ATmega32HVB__" },
+   { "atmega406",    ARCH_AVR5, "__AVR_ATmega406__" },
+   { "atmega64",     ARCH_AVR5, "__AVR_ATmega64__" },
+   { "atmega640",    ARCH_AVR5, "__AVR_ATmega640__" },
+@@ -258,12 +274,13 @@
+   { "atmega128",    ARCH_AVR5, "__AVR_ATmega128__" },
+   { "atmega1280",   ARCH_AVR5, "__AVR_ATmega1280__" },
+   { "atmega1281",   ARCH_AVR5, "__AVR_ATmega1281__" },
++  { "atmega1284p",  ARCH_AVR5, "__AVR_ATmega1284P__" },
+   { "atmega16hva",  ARCH_AVR5, "__AVR_ATmega16HVA__" },
    { "at90can32",    ARCH_AVR5, "__AVR_AT90CAN32__" },
    { "at90can64",    ARCH_AVR5, "__AVR_AT90CAN64__" },
    { "at90can128",   ARCH_AVR5, "__AVR_AT90CAN128__" },
+-  { "at90usb82",    ARCH_AVR5, "__AVR_AT90USB82__" },
+-  { "at90usb162",   ARCH_AVR5, "__AVR_AT90USB162__" },
 +  { "at90pwm216",   ARCH_AVR5, "__AVR_AT90PWM216__" },
 +  { "at90pwm316",   ARCH_AVR5, "__AVR_AT90PWM316__" },
-   { "at90usb82",    ARCH_AVR5, "__AVR_AT90USB82__" },
-   { "at90usb162",   ARCH_AVR5, "__AVR_AT90USB162__" },
    { "at90usb646",   ARCH_AVR5, "__AVR_AT90USB646__" },
+   { "at90usb647",   ARCH_AVR5, "__AVR_AT90USB647__" },
+   { "at90usb1286",  ARCH_AVR5, "__AVR_AT90USB1286__" },
 --- gcc/config/avr/t-avr.orig	Fri Apr 27 22:53:57 2007
-+++ gcc/config/avr/t-avr	Sun Oct 28 00:00:47 2007
-@@ -53,6 +53,8 @@
++++ gcc/config/avr/t-avr	Wed Dec 19 14:01:08 2007
+@@ -37,8 +37,8 @@
+ 
+ FPBIT = fp-bit.c
+ 
+-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr4/mmcu=avr5
+-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr4 avr5
++MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr35/mmcu=avr4/mmcu=avr5
++MULTILIB_DIRNAMES = avr2 avr25 avr3 avr35 avr4 avr5
+ 
+ # The many avr2 matches are not listed here - this is the default.
+ MULTILIB_MATCHES = \
+@@ -53,21 +53,30 @@
  	mmcu?avr25=mmcu?attiny261 \
  	mmcu?avr25=mmcu?attiny461 \
  	mmcu?avr25=mmcu?attiny861 \
 +	mmcu?avr25=mmcu?attiny43u \
 +	mmcu?avr25=mmcu?attiny48 \
++	mmcu?avr25=mmcu?attiny88 \
  	mmcu?avr25=mmcu?at86rf401 \
  	mmcu?avr3=mmcu?atmega103 \
  	mmcu?avr3=mmcu?atmega603 \
-@@ -60,14 +62,18 @@
+ 	mmcu?avr3=mmcu?at43usb320 \
  	mmcu?avr3=mmcu?at43usb355 \
  	mmcu?avr3=mmcu?at76c711 \
++	mmcu?avr35=mmcu?at90usb82 \
++	mmcu?avr35=mmcu?at90usb162 \
  	mmcu?avr4=mmcu?atmega48 \
 +	mmcu?avr4=mmcu?atmega48p \
  	mmcu?avr4=mmcu?atmega8 \
@@ -82,7 +133,7 @@
  	mmcu?avr5=mmcu?atmega16 \
  	mmcu?avr5=mmcu?atmega161 \
  	mmcu?avr5=mmcu?atmega162 \
-@@ -76,6 +82,7 @@
+@@ -76,6 +85,7 @@
  	mmcu?avr5=mmcu?atmega165 \
  	mmcu?avr5=mmcu?atmega165p \
  	mmcu?avr5=mmcu?atmega168 \
@@ -90,7 +141,7 @@
  	mmcu?avr5=mmcu?atmega169 \
  	mmcu?avr5=mmcu?atmega169p \
  	mmcu?avr5=mmcu?atmega32 \
-@@ -85,6 +92,7 @@
+@@ -85,10 +95,12 @@
  	mmcu?avr5=mmcu?atmega325p \
  	mmcu?avr5=mmcu?atmega3250 \
  	mmcu?avr5=mmcu?atmega3250p \
@@ -98,20 +149,46 @@
  	mmcu?avr5=mmcu?atmega329 \
  	mmcu?avr5=mmcu?atmega329p \
  	mmcu?avr5=mmcu?atmega3290 \
-@@ -105,6 +113,8 @@
+ 	mmcu?avr5=mmcu?atmega3290p \
++	mmcu?avr5=mmcu?atmega32hvb \
+ 	mmcu?avr5=mmcu?atmega406 \
+ 	mmcu?avr5=mmcu?atmega64  \
+ 	mmcu?avr5=mmcu?atmega640 \
+@@ -101,12 +113,13 @@
+ 	mmcu?avr5=mmcu?atmega128 \
+ 	mmcu?avr5=mmcu?atmega1280 \
+ 	mmcu?avr5=mmcu?atmega1281 \
++	mmcu?avr5=mmcu?atmega1284p \
+ 	mmcu?avr5=mmcu?atmega16hva \
  	mmcu?avr5=mmcu?at90can32 \
  	mmcu?avr5=mmcu?at90can64 \
  	mmcu?avr5=mmcu?at90can128 \
+-	mmcu?avr5=mmcu?at90usb82 \
+-	mmcu?avr5=mmcu?at90usb162 \
 +	mmcu?avr5=mmcu?at90pwm216 \
 +	mmcu?avr5=mmcu?at90pwm316 \
- 	mmcu?avr5=mmcu?at90usb82 \
- 	mmcu?avr5=mmcu?at90usb162 \
  	mmcu?avr5=mmcu?at90usb646 \
---- gcc/config/avr/avr.h.orig	Sat Oct 27 23:39:36 2007
-+++ gcc/config/avr/avr.h	Sun Oct 28 00:00:34 2007
-@@ -763,22 +763,29 @@
+ 	mmcu?avr5=mmcu?at90usb647 \
+ 	mmcu?avr5=mmcu?at90usb1286 \
+--- gcc/config/avr/avr.h.orig	Wed Dec 19 13:39:10 2007
++++ gcc/config/avr/avr.h	Wed Dec 19 14:02:06 2007
+@@ -733,7 +733,7 @@
+ /* A C string constant that tells the GCC drvier program options to
+    pass to `cc1plus'.  */
+ 
+-#define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;\
++#define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;\
+ mmcu=*:-mmcu=%*}"
+ 
+ #define LINK_SPEC " %{!mmcu*:-m avr2}\
+@@ -759,36 +759,50 @@
+ %{mmcu=atmega103|\
+   mmcu=atmega603|\
    mmcu=at43*|\
-   mmcu=at76*:-m avr3}\
+-  mmcu=at76*:-m avr3}\
++  mmcu=at76*:|\
++  mmcu=at90usb82|\
++  mmcu=at90usb162:-m avr3}	  \
  %{mmcu=atmega8*|\
 -  mmcu=atmega48|\
 -  mmcu=at90pwm*:-m avr4}\
@@ -127,9 +204,11 @@
    mmcu=atmega64*|\
    mmcu=atmega128*|\
    mmcu=at90can*|\
+-  mmcu=at90usb*|\
 +  mmcu=at90pwm216|\
 +  mmcu=at90pwm316|\
-   mmcu=at90usb*|\
++  mmcu=at90usb6*|\
++  mmcu=at90usb12*|\
    mmcu=at94k:-m avr5}\
  %{mmcu=atmega324*|\
    mmcu=atmega325*|\
@@ -143,7 +222,9 @@
    mmcu=atmega64|\
    mmcu=atmega644*|\
    mmcu=atmega645*|\
-@@ -787,10 +794,11 @@
+   mmcu=atmega649*|\
+   mmcu=atmega128|\
++  mmcu=atmega1284p|\
    mmcu=atmega162|\
    mmcu=atmega164*|\
    mmcu=atmega165*|\
@@ -152,20 +233,23 @@
    mmcu=atmega169*|\
    mmcu=atmega8hva|\
    mmcu=atmega16hva|\
++  mmcu=atmega32hvb|\
 +  mmcu=attiny48|\
++  mmcu=attiny88|\
    mmcu=at90can*|\
    mmcu=at90pwm*|\
    mmcu=at90usb*: -Tdata 0x800100}\
-@@ -841,6 +849,8 @@
+@@ -839,6 +853,9 @@
  %{mmcu=attiny261:crttn261.o%s} \
  %{mmcu=attiny461:crttn461.o%s} \
  %{mmcu=attiny861:crttn861.o%s} \
 +%{mmcu=attiny43u:crttn43u.o%s} \
 +%{mmcu=attiny48:crttn48.o%s} \
++%{mmcu=attiny88:crttn88.o%s} \
  %{mmcu=atmega103|mmcu=avr3:crtm103.o%s} \
  %{mmcu=atmega603:crtm603.o%s} \
  %{mmcu=at43usb320:crt43320.o%s} \
-@@ -848,12 +858,16 @@
+@@ -846,12 +863,16 @@
  %{mmcu=at76c711:crt76711.o%s} \
  %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
  %{mmcu=atmega48:crtm48.o%s} \
@@ -182,7 +266,7 @@
  %{mmcu=atmega16:crtm16.o%s} \
  %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
  %{mmcu=atmega162:crtm162.o%s} \
-@@ -862,6 +876,7 @@
+@@ -860,6 +881,7 @@
  %{mmcu=atmega165:crtm165.o%s} \
  %{mmcu=atmega165p:crtm165p.o%s} \
  %{mmcu=atmega168:crtm168.o%s} \
@@ -190,7 +274,7 @@
  %{mmcu=atmega169:crtm169.o%s} \
  %{mmcu=atmega169p:crtm169p.o%s} \
  %{mmcu=atmega32:crtm32.o%s} \
-@@ -871,6 +886,7 @@
+@@ -869,10 +891,12 @@
  %{mmcu=atmega325p:crtm325p.o%s} \
  %{mmcu=atmega3250:crtm3250.o%s} \
  %{mmcu=atmega3250p:crtm3250p.o%s} \
@@ -198,7 +282,18 @@
  %{mmcu=atmega329:crtm329.o%s} \
  %{mmcu=atmega329p:crtm329p.o%s} \
  %{mmcu=atmega3290:crtm3290.o%s} \
-@@ -892,6 +908,8 @@
+ %{mmcu=atmega3290p:crtm3290p.o%s} \
++%{mmcu=atmega32hvb:crtm32hvb.o%s} \
+ %{mmcu=atmega406:crtm406.o%s} \
+ %{mmcu=atmega64:crtm64.o%s} \
+ %{mmcu=atmega640:crtm640.o%s} \
+@@ -885,11 +909,14 @@
+ %{mmcu=atmega128:crtm128.o%s} \
+ %{mmcu=atmega1280:crtm1280.o%s} \
+ %{mmcu=atmega1281:crtm1281.o%s} \
++%{mmcu=atmega1284p:crtm1284p.o%s} \
+ %{mmcu=atmega8hva:crtm8hva.o%s} \
+ %{mmcu=atmega16hva:crtm16hva.o%s} \
  %{mmcu=at90can32:crtcan32.o%s} \
  %{mmcu=at90can64:crtcan64.o%s} \
  %{mmcu=at90can128:crtcan128.o%s} \
diff --git a/devel/avr-gcc/files/patch-os_main-os_task b/devel/avr-gcc/files/patch-os_main-os_task
new file mode 100644
index 000000000000..3249e512a485
--- /dev/null
+++ b/devel/avr-gcc/files/patch-os_main-os_task
@@ -0,0 +1,222 @@
+Index: gcc/config/avr/avr.c
+===================================================================
+--- gcc/config/avr/avr.c	(revision 129730)
++++ gcc/config/avr/avr.c	(working copy)
+@@ -48,6 +48,8 @@
+ #define MAX_LD_OFFSET(MODE) (64 - (signed)GET_MODE_SIZE (MODE))
+ 
+ static int avr_naked_function_p (tree);
++static int avr_OS_main_function_p (tree);
++static int avr_OS_task_function_p (tree);
+ static int interrupt_function_p (tree);
+ static int signal_function_p (tree);
+ static int avr_regs_to_save (HARD_REG_SET *);
+@@ -400,6 +402,33 @@
+   return a != NULL_TREE;
+ }
+ 
++/* Return nonzero if FUNC is a OS_main function.  */
++
++static int
++avr_OS_main_function_p (tree func)
++{
++  tree a;
++
++  gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
++  
++  a = lookup_attribute ("OS_main", TYPE_ATTRIBUTES (TREE_TYPE (func)));
++  return a != NULL_TREE;
++}
++
++/* Return nonzero if FUNC is a OS_task function.  */
++
++static int
++avr_OS_task_function_p (tree func)
++{
++  tree a;
++
++  gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
++  
++  a = lookup_attribute ("OS_task", TYPE_ATTRIBUTES (TREE_TYPE (func)));
++  return a != NULL_TREE;
++}
++
++
+ /* Return nonzero if FUNC is an interrupt function as specified
+    by the "interrupt" attribute.  */
+ 
+@@ -445,8 +474,11 @@
+     CLEAR_HARD_REG_SET (*set);
+   count = 0;
+ 
+-  /* No need to save any registers if the function never returns.  */
+-  if (TREE_THIS_VOLATILE (current_function_decl))
++  /* No need to save any registers if the function never returns or 
++     is have "OS_main" or OS_task attribute.  */
++  if (TREE_THIS_VOLATILE (current_function_decl)
++      || avr_OS_main_function_p (current_function_decl)
++      || avr_OS_task_function_p (current_function_decl))
+     return 0;
+ 
+   for (reg = 0; reg < 32; reg++)
+@@ -497,7 +529,6 @@
+ 	  && ! interrupt_function_p (current_function_decl)
+ 	  && ! signal_function_p (current_function_decl)
+ 	  && ! avr_naked_function_p (current_function_decl)
+-	  && ! MAIN_NAME_P (DECL_NAME (current_function_decl))
+ 	  && ! TREE_THIS_VOLATILE (current_function_decl));
+ }
+ 
+@@ -666,7 +697,8 @@
+   int reg;
+   int interrupt_func_p;
+   int signal_func_p;
+-  int main_p;
++  int OS_main_p;
++  int OS_task_p;
+   int live_seq;
+   int minimize;
+ 
+@@ -684,9 +716,11 @@
+ 
+   interrupt_func_p = interrupt_function_p (current_function_decl);
+   signal_func_p = signal_function_p (current_function_decl);
+-  main_p = MAIN_NAME_P (DECL_NAME (current_function_decl));
++  OS_main_p = avr_OS_main_function_p (current_function_decl);
++  OS_task_p = avr_OS_task_function_p (current_function_decl);
+   live_seq = sequent_regs_live ();
+   minimize = (TARGET_CALL_PROLOGUES
++	      && !OS_main_p && !OS_task_p
+ 	      && !interrupt_func_p && !signal_func_p && live_seq);
+ 
+   if (interrupt_func_p)
+@@ -704,19 +738,8 @@
+ 	       AS1 (clr,__zero_reg__)    "\n");
+       prologue_size += 5;
+     }
+-  if (main_p)
++  if (minimize && (frame_pointer_needed || live_seq > 6)) 
+     {
+-      fprintf (file, ("\t" 
+-		      AS1 (ldi,r28) ",lo8(%s - " HOST_WIDE_INT_PRINT_DEC ")" CR_TAB
+-		      AS1 (ldi,r29) ",hi8(%s - " HOST_WIDE_INT_PRINT_DEC ")" CR_TAB
+-		      AS2 (out,__SP_H__,r29)     CR_TAB
+-		      AS2 (out,__SP_L__,r28) "\n"),
+-	       avr_init_stack, size, avr_init_stack, size);
+-      
+-      prologue_size += 4;
+-    }
+-  else if (minimize && (frame_pointer_needed || live_seq > 6)) 
+-    {
+       fprintf (file, ("\t"
+ 		      AS1 (ldi, r26) ",lo8(" HOST_WIDE_INT_PRINT_DEC ")" CR_TAB
+ 		      AS1 (ldi, r27) ",hi8(" HOST_WIDE_INT_PRINT_DEC ")" CR_TAB), size, size);
+@@ -754,12 +777,17 @@
+ 	}
+       if (frame_pointer_needed)
+ 	{
++	  if (!OS_main_p && !OS_task_p)
++            {
++	      fprintf (file, "\t"
++		       AS1 (push,r28) CR_TAB
++		       AS1 (push,r29) "\n");
++	      prologue_size += 2;
++	    }
+ 	  fprintf (file, "\t"
+-		   AS1 (push,r28) CR_TAB
+-		   AS1 (push,r29) CR_TAB
+ 		   AS2 (in,r28,__SP_L__) CR_TAB
+ 		   AS2 (in,r29,__SP_H__) "\n");
+-	  prologue_size += 4;
++	  prologue_size += 2;
+ 	  if (size)
+ 	    {
+ 	      fputs ("\t", file);
+@@ -769,7 +797,7 @@
+ 		{
+ 		  prologue_size += out_set_stack_ptr (file, 1, 1);
+ 		}
+-	      else if (signal_func_p)
++	      else if (signal_func_p || OS_main_p)
+ 		{
+ 		  prologue_size += out_set_stack_ptr (file, 0, 0);
+ 		}
+@@ -793,7 +821,8 @@
+   int reg;
+   int interrupt_func_p;
+   int signal_func_p;
+-  int main_p;
++  int OS_main_p;
++  int OS_task_p;
+   int function_size;
+   int live_seq;
+   int minimize;
+@@ -825,28 +854,15 @@
+ 
+   interrupt_func_p = interrupt_function_p (current_function_decl);
+   signal_func_p = signal_function_p (current_function_decl);
+-  main_p = MAIN_NAME_P (DECL_NAME (current_function_decl));
++  OS_main_p = avr_OS_main_function_p (current_function_decl);
++  OS_task_p = avr_OS_task_function_p (current_function_decl);
+   live_seq = sequent_regs_live ();
+   minimize = (TARGET_CALL_PROLOGUES
++	      && !OS_main_p && !OS_task_p
+ 	      && !interrupt_func_p && !signal_func_p && live_seq);
+   
+-  if (main_p)
++  if (minimize && (frame_pointer_needed || live_seq > 4))
+     {
+-      /* Return value from main() is already in the correct registers
+-	 (r25:r24) as the exit() argument.  */
+-      if (AVR_MEGA)
+-	{
+-	  fputs ("\t" AS1 (jmp,exit) "\n", file);
+-	  epilogue_size += 2;
+-	}
+-      else
+-	{
+-	  fputs ("\t" AS1 (rjmp,exit) "\n", file);
+-	  ++epilogue_size;
+-	}
+-    }
+-  else if (minimize && (frame_pointer_needed || live_seq > 4))
+-    {
+       fprintf (file, ("\t" AS2 (ldi, r30, %d) CR_TAB), live_seq);
+       ++epilogue_size;
+       if (frame_pointer_needed)
+@@ -893,10 +909,13 @@
+ 		  epilogue_size += out_set_stack_ptr (file, -1, -1);
+ 		}
+ 	    }
+-	  fprintf (file, "\t"
+-		   AS1 (pop,r29) CR_TAB
+-		   AS1 (pop,r28) "\n");
+-	  epilogue_size += 2;
++	  if (!OS_main_p && !OS_task_p)
++            {
++	      fprintf (file, "\t"
++		       AS1 (pop,r29) CR_TAB
++		       AS1 (pop,r28) "\n");
++	      epilogue_size += 2;
++	    }
+ 	}
+ 
+       epilogue_size += avr_regs_to_save (&set);
+@@ -4643,6 +4662,8 @@
+    interrupt - make a function to be hardware interrupt. After function
+    prologue interrupts are enabled;
+    naked     - don't generate function prologue/epilogue and `ret' command.
++   OS_main - ...
++   OS_task - ...
+ 
+    Only `progmem' attribute valid for type.  */
+ 
+@@ -4653,6 +4674,8 @@
+   { "signal",    0, 0, true,  false, false,  avr_handle_fndecl_attribute },
+   { "interrupt", 0, 0, true,  false, false,  avr_handle_fndecl_attribute },
+   { "naked",     0, 0, false, true,  true,   avr_handle_fntype_attribute },
++  { "OS_main",   0, 0, false, true,  true,   avr_handle_fntype_attribute },
++  { "OS_task",   0, 0, false, true,  true,   avr_handle_fntype_attribute },
+   { NULL,        0, 0, false, false, false, NULL }
+ };
+ 
diff --git a/devel/avr-gcc/files/patch-zero_extend b/devel/avr-gcc/files/patch-zero_extend
new file mode 100644
index 000000000000..235fc0d333f6
--- /dev/null
+++ b/devel/avr-gcc/files/patch-zero_extend
@@ -0,0 +1,129 @@
+Index: gcc/config/avr/avr.md
+===================================================================
+--- gcc/config/avr/avr.md	(revision 126148)
++++ gcc/config/avr/avr.md	(working copy)
+@@ -1685,40 +1685,96 @@
+ ;; xx<---x xx<---x xx<---x xx<---x xx<---x xx<---x xx<---x xx<---x xx<---x
+ ;; zero extend
+ 
+-(define_insn "zero_extendqihi2"
+-  [(set (match_operand:HI 0 "register_operand" "=r,r")
+-        (zero_extend:HI (match_operand:QI 1 "register_operand" "0,*r")))]
++(define_insn_and_split "zero_extendqihi2"
++  [(set (match_operand:HI 0 "register_operand" "=r")
++        (zero_extend:HI (match_operand:QI 1 "register_operand" "r")))]
+   ""
+-  "@
+-	clr %B0
+-	mov %A0,%A1\;clr %B0"
+-  [(set_attr "length" "1,2")
+-   (set_attr "cc" "set_n,set_n")])
++  "#"
++  "reload_completed"
++  [(set (match_dup 2) (match_dup 1))
++   (set (match_dup 3) (const_int 0))]
++  "unsigned int low_off = subreg_lowpart_offset (QImode, HImode);
++   unsigned int high_off = subreg_highpart_offset (QImode, HImode);
++   
++   operands[2] = simplify_gen_subreg (QImode, operands[0], HImode, low_off);
++   operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, high_off);
++  ")
+ 
+-(define_insn "zero_extendqisi2"
+-  [(set (match_operand:SI 0 "register_operand" "=r,r")
+-        (zero_extend:SI (match_operand:QI 1 "register_operand" "0,*r")))]
++(define_insn_and_split "zero_extendqisi2"
++  [(set (match_operand:SI 0 "register_operand" "=r")
++        (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))]
+   ""
+-  "@
+-	clr %B0\;clr %C0\;clr %D0
+-	mov %A0,%A1\;clr %B0\;clr %C0\;clr %D0"
+-  [(set_attr "length" "3,4")
+-   (set_attr "cc" "set_n,set_n")])
++  "#"
++  "reload_completed"
++  [(set (match_dup 2) (zero_extend:HI (match_dup 1)))
++   (set (match_dup 3) (const_int 0))]
++  "unsigned int low_off = subreg_lowpart_offset (HImode, SImode);
++   unsigned int high_off = subreg_highpart_offset (HImode, SImode);
++   
++   operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off);
++   operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off);
++  ")
+ 
+-(define_insn "zero_extendhisi2"
+-  [(set (match_operand:SI 0 "register_operand" "=r,&r")
+-        (zero_extend:SI (match_operand:HI 1 "register_operand" "0,*r")))]
++(define_insn_and_split "zero_extendhisi2"
++  [(set (match_operand:SI 0 "register_operand" "=r")
++        (zero_extend:SI (match_operand:HI 1 "register_operand" "r")))]
+   ""
+-  "@
+-	clr %C0\;clr %D0
+-	{mov %A0,%A1\;mov %B0,%B1|movw %A0,%A1}\;clr %C0\;clr %D0"
+-  [(set_attr_alternative "length"
+-			 [(const_int 2)
+-			  (if_then_else (eq_attr "mcu_have_movw" "yes")
+-					(const_int 3)
+-					(const_int 4))])
+-   (set_attr "cc" "set_n,set_n")])
++  "#"
++  "reload_completed"
++  [(set (match_dup 2) (match_dup 1))
++   (set (match_dup 3) (const_int 0))]
++  "unsigned int low_off = subreg_lowpart_offset (HImode, SImode);
++   unsigned int high_off = subreg_highpart_offset (HImode, SImode);
++   
++   operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off);
++   operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off);
++  ")
+ 
++(define_insn_and_split "zero_extendqidi2"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++        (zero_extend:DI (match_operand:QI 1 "register_operand" "r")))]
++  ""
++  "#"
++  "reload_completed"
++  [(set (match_dup 2) (zero_extend:SI (match_dup 1)))
++   (set (match_dup 3) (const_int 0))]
++  "unsigned int low_off = subreg_lowpart_offset (SImode, DImode);
++   unsigned int high_off = subreg_highpart_offset (SImode, DImode);
++   
++   operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off);
++   operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off);
++  ")
++
++(define_insn_and_split "zero_extendhidi2"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++        (zero_extend:DI (match_operand:HI 1 "register_operand" "r")))]
++  ""
++  "#"
++  "reload_completed"
++  [(set (match_dup 2) (zero_extend:SI (match_dup 1)))
++   (set (match_dup 3) (const_int 0))]
++  "unsigned int low_off = subreg_lowpart_offset (SImode, DImode);
++   unsigned int high_off = subreg_highpart_offset (SImode, DImode);
++   
++   operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off);
++   operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off);
++  ")
++
++(define_insn_and_split "zero_extendsidi2"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++        (zero_extend:DI (match_operand:SI 1 "register_operand" "r")))]
++  ""
++  "#"
++  "reload_completed"
++  [(set (match_dup 2) (match_dup 1))
++   (set (match_dup 3) (const_int 0))]
++  "unsigned int low_off = subreg_lowpart_offset (SImode, DImode);
++   unsigned int high_off = subreg_highpart_offset (SImode, DImode);
++   
++   operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off);
++   operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off);
++  ")
++
+ ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=>
+ ;; compare
+ 
diff --git a/devel/avr-gcc/files/patch-zz-atmega256x b/devel/avr-gcc/files/patch-zz-atmega256x
index 0fcaf7b3e43f..e51b2a44d0e5 100644
--- a/devel/avr-gcc/files/patch-zz-atmega256x
+++ b/devel/avr-gcc/files/patch-zz-atmega256x
@@ -1,8 +1,6 @@
-Index: gcc/config/avr/avr.c
-===================================================================
---- gcc/config/avr/avr.c	(revision 124356)
-+++ gcc/config/avr/avr.c	(working copy)
-@@ -129,22 +129,27 @@
+--- gcc/config/avr/avr.c.orig	Wed Dec 19 14:18:09 2007
++++ gcc/config/avr/avr.c	Wed Dec 19 14:34:15 2007
+@@ -131,23 +131,28 @@
  /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
  int avr_have_movw_lpmx_p = 0;
  
@@ -24,6 +22,7 @@ Index: gcc/config/avr/avr.c
 -  { 0, 0, 0, 0, "__AVR_ARCH__=2" },
 -  { 0, 0, 0, 1, "__AVR_ARCH__=25"},
 -  { 0, 0, 1, 0, "__AVR_ARCH__=3" },
+-  { 0, 0, 1, 1, "__AVR_ARCH__=35"},
 -  { 0, 1, 0, 1, "__AVR_ARCH__=4" },
 -  { 0, 1, 1, 1, "__AVR_ARCH__=5" }
 +  { 1, 0, 0, 0, 0,  NULL },  /* unknown device specified */
@@ -31,15 +30,16 @@ Index: gcc/config/avr/avr.c
 +  { 0, 0, 0, 0, 0, "__AVR_ARCH__=2" },
 +  { 0, 0, 0, 1, 0, "__AVR_ARCH__=25"},
 +  { 0, 0, 1, 0, 0, "__AVR_ARCH__=3" },
++  { 0, 0, 1, 1, 0, "__AVR_ARCH__=35" },
 +  { 0, 1, 0, 1, 0, "__AVR_ARCH__=4" },
 +  { 0, 1, 1, 1, 0, "__AVR_ARCH__=5" },
 +  { 0, 1, 1, 1, 1, "__AVR_ARCH__=6" }
  };
  
  /* These names are used as the index into the avr_arch_types[] table 
-@@ -158,7 +163,8 @@
-   ARCH_AVR25,
+@@ -162,7 +167,8 @@
    ARCH_AVR3,
+   ARCH_AVR35,
    ARCH_AVR4,
 -  ARCH_AVR5
 +  ARCH_AVR5,
@@ -47,7 +47,7 @@ Index: gcc/config/avr/avr.c
  };
  
  struct mcu_type_s {
-@@ -269,6 +275,10 @@
+@@ -288,6 +294,10 @@
    { "at90usb1286",  ARCH_AVR5, "__AVR_AT90USB1286__" },
    { "at90usb1287",  ARCH_AVR5, "__AVR_AT90USB1287__" },
    { "at94k",        ARCH_AVR5, "__AVR_AT94K__" },
@@ -58,7 +58,7 @@ Index: gcc/config/avr/avr.c
      /* Assembler only.  */
    { "avr1",         ARCH_AVR1, NULL },
    { "at90s1200",    ARCH_AVR1, "__AVR_AT90S1200__" },
-@@ -351,6 +361,7 @@
+@@ -370,6 +380,7 @@
    avr_enhanced_p = base->enhanced;
    avr_mega_p = base->mega;
    avr_have_movw_lpmx_p = base->have_movw_lpmx;
@@ -66,7 +66,7 @@ Index: gcc/config/avr/avr.c
    avr_base_arch_macro = base->macro;
    avr_extra_arch_macro = t->macro;
  
-@@ -480,9 +491,10 @@
+@@ -529,9 +540,10 @@
    else
      {
        int offset = frame_pointer_needed ? 2 : 0;
@@ -78,7 +78,7 @@ Index: gcc/config/avr/avr.c
      }
  }
  
-@@ -1103,7 +1115,7 @@
+@@ -1139,7 +1151,7 @@
  	  && ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (addr))
  	      || GET_CODE (addr) == LABEL_REF))
  	{
@@ -87,7 +87,7 @@ Index: gcc/config/avr/avr.c
  	  output_addr_const (file,addr);
  	  fprintf (file ,")");
  	}
-@@ -1128,6 +1140,11 @@
+@@ -1164,6 +1176,11 @@
        if (!AVR_MEGA)
  	fputc ('r', file);
      }
@@ -99,7 +99,7 @@ Index: gcc/config/avr/avr.c
    else if (REG_P (x))
      {
        if (x == zero_reg_rtx)
-@@ -4524,7 +4541,7 @@
+@@ -4560,7 +4577,7 @@
        && ((GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (x))
  	  || GET_CODE (x) == LABEL_REF))
      {
@@ -108,7 +108,7 @@ Index: gcc/config/avr/avr.c
        output_addr_const (asm_out_file, x);
        fputs (")\n", asm_out_file);
        return true;
-@@ -5898,7 +5915,7 @@
+@@ -5954,7 +5971,7 @@
  {
    switch_to_section (progmem_section);
    if (AVR_MEGA)
@@ -117,8 +117,8 @@ Index: gcc/config/avr/avr.c
    else
      fprintf (stream, "\trjmp .L%d\n", value);
  
---- gcc/config/avr/avr.h.orig	Sun Oct 28 00:13:49 2007
-+++ gcc/config/avr/avr.h	Sun Oct 28 00:15:29 2007
+--- gcc/config/avr/avr.h.orig	Wed Dec 19 14:18:09 2007
++++ gcc/config/avr/avr.h	Wed Dec 19 14:44:32 2007
 @@ -36,6 +36,12 @@
  	builtin_define ("__AVR_HAVE_LPMX__");	\
        if (avr_asm_only_p)			\
@@ -149,7 +149,7 @@ Index: gcc/config/avr/avr.c
  
  #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
  
-@@ -633,7 +642,7 @@
+@@ -631,7 +640,7 @@
  
  #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
  
@@ -158,15 +158,15 @@ Index: gcc/config/avr/avr.c
  
  #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
  
-@@ -779,6 +788,7 @@
-   mmcu=at90pwm316|\
-   mmcu=at90usb*|\
+@@ -780,6 +789,7 @@
+   mmcu=at90usb6*|\
+   mmcu=at90usb12*|\
    mmcu=at94k:-m avr5}\
 +%{mmcu=atmega256*:-m avr6}\
  %{mmcu=atmega324*|\
    mmcu=atmega325*|\
    mmcu=atmega328p|\
-@@ -804,7 +814,8 @@
+@@ -808,7 +818,8 @@
    mmcu=at90usb*: -Tdata 0x800100}\
  %{mmcu=atmega640|\
    mmcu=atmega1280|\
@@ -176,20 +176,18 @@ Index: gcc/config/avr/avr.c
  
  #define LIB_SPEC \
    "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
-@@ -903,6 +914,8 @@
- %{mmcu=atmega128:crtm128.o%s} \
+@@ -910,6 +921,8 @@
  %{mmcu=atmega1280:crtm1280.o%s} \
  %{mmcu=atmega1281:crtm1281.o%s} \
+ %{mmcu=atmega1284p:crtm1284p.o%s} \
 +%{mmcu=atmega2560:crtm2560.o%s} \
 +%{mmcu=atmega2561:crtm2561.o%s} \
  %{mmcu=atmega8hva:crtm8hva.o%s} \
  %{mmcu=atmega16hva:crtm16hva.o%s} \
  %{mmcu=at90can32:crtcan32.o%s} \
-Index: gcc/config/avr/avr.md
-===================================================================
---- gcc/config/avr/avr.md	(revision 124356)
-+++ gcc/config/avr/avr.md	(working copy)
-@@ -33,6 +33,7 @@
+--- gcc/config/avr/avr.md.orig	Wed Dec 19 14:18:10 2007
++++ gcc/config/avr/avr.md	Wed Dec 19 14:18:10 2007
+@@ -32,6 +32,7 @@
  ;;  p  POST_INC or PRE_DEC address as a pointer (X, Y, Z)
  ;;  r  POST_INC or PRE_DEC address as a register (r26, r28, r30)
  ;;  ~  Output 'r' if not AVR_MEGA.
@@ -197,7 +195,7 @@ Index: gcc/config/avr/avr.md
  
  ;; UNSPEC usage:
  ;;  0  Length of a string, see "strlenhi".
-@@ -2100,22 +2101,22 @@
+@@ -2340,22 +2341,22 @@
    "(register_operand (operands[0], HImode) || CONSTANT_P (operands[0]))"
    "*{
    if (which_alternative==0)
@@ -224,7 +222,7 @@ Index: gcc/config/avr/avr.md
  }"
    [(set_attr "cc" "clobber,clobber,clobber,clobber")
     (set_attr_alternative "length"
-@@ -2137,22 +2138,22 @@
+@@ -2377,22 +2378,22 @@
    "(register_operand (operands[0], VOIDmode) || CONSTANT_P (operands[0]))"
    "*{
    if (which_alternative==0)
@@ -251,7 +249,7 @@ Index: gcc/config/avr/avr.md
  }"
    [(set_attr "cc" "clobber,clobber,clobber,clobber")
     (set_attr_alternative "length"
-@@ -2182,13 +2183,20 @@
+@@ -2422,13 +2423,20 @@
  ; indirect jump
  (define_insn "indirect_jump"
    [(set (pc) (match_operand:HI 0 "register_operand" "!z,*r"))]
@@ -273,7 +271,7 @@ Index: gcc/config/avr/avr.md
  ;; table jump
  
  ;; Table made from "rjmp" instructions for <=8K devices.
-@@ -2197,7 +2205,7 @@
+@@ -2437,7 +2445,7 @@
  			UNSPEC_INDEX_JMP))
     (use (label_ref (match_operand 1 "" "")))
     (clobber (match_dup 0))]
@@ -282,7 +280,7 @@ Index: gcc/config/avr/avr.md
    "@
  	ijmp
  	push %A0\;push %B0\;ret"
-@@ -2226,7 +2234,7 @@
+@@ -2466,7 +2474,7 @@
  	lpm __tmp_reg__,Z+
  	lpm r31,Z
  	mov r30,__tmp_reg__
@@ -291,7 +289,7 @@ Index: gcc/config/avr/avr.md
    [(set_attr "length" "6")
     (set_attr "cc" "clobber")])
  
-@@ -2235,7 +2243,7 @@
+@@ -2475,7 +2483,7 @@
  			UNSPEC_INDEX_JMP))
     (use (label_ref (match_operand 1 "" "")))
     (clobber (match_dup 0))]
@@ -300,10 +298,8 @@ Index: gcc/config/avr/avr.md
    "lsl r30
  	rol r31
  	lpm
-Index: gcc/config/avr/libgcc.S
-===================================================================
---- gcc/config/avr/libgcc.S	(revision 124356)
-+++ gcc/config/avr/libgcc.S	(working copy)
+--- gcc/config/avr/libgcc.S.orig	Mon Jun 19 17:04:27 2006
++++ gcc/config/avr/libgcc.S	Wed Dec 19 14:18:10 2007
 @@ -593,7 +593,12 @@
  	out	__SP_H__,r29
  	out	__SREG__,__tmp_reg__
@@ -340,22 +336,20 @@ Index: gcc/config/avr/libgcc.S
  	ret
  #endif
  	.endfunc
-Index: gcc/config/avr/t-avr
-===================================================================
---- gcc/config/avr/t-avr	(revision 124356)
-+++ gcc/config/avr/t-avr	(working copy)
+--- gcc/config/avr/t-avr.orig	Wed Dec 19 14:18:09 2007
++++ gcc/config/avr/t-avr	Wed Dec 19 14:30:07 2007
 @@ -37,8 +37,8 @@
  
  FPBIT = fp-bit.c
  
--MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr4/mmcu=avr5
--MULTILIB_DIRNAMES = avr2 avr25 avr3 avr4 avr5
-+MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr4/mmcu=avr5/mmcu=avr6
-+MULTILIB_DIRNAMES = avr2 avr25 avr3 avr4 avr5 avr6
+-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr35/mmcu=avr4/mmcu=avr5
+-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr35 avr4 avr5
++MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr6
++MULTILIB_DIRNAMES = avr2 avr25 avr3 avr35 avr4 avr5 avr6
  
  # The many avr2 matches are not listed here - this is the default.
  MULTILIB_MATCHES = \
-@@ -111,7 +111,9 @@
+@@ -124,7 +124,9 @@
  	mmcu?avr5=mmcu?at90usb647 \
  	mmcu?avr5=mmcu?at90usb1286 \
  	mmcu?avr5=mmcu?at90usb1287 \
@@ -365,4 +359,3 @@ Index: gcc/config/avr/t-avr
 +	mmcu?avr6=mmcu?atmega2561
  
  MULTILIB_EXCEPTIONS =
- 
diff --git a/devel/avr-gcc/pkg-descr b/devel/avr-gcc/pkg-descr
index 4d3455861dbf..0471f981c4d2 100644
--- a/devel/avr-gcc/pkg-descr
+++ b/devel/avr-gcc/pkg-descr
@@ -4,15 +4,18 @@ Included is the basic C++ compiler, although this is only of limited
 use without a libstdc++, and it is little tested.
 
 Supported debugging formats: -gdwarf-2 [default], -gstabs
-Locally hack added: recognizes 0bXXX binary constants
+Local patch added: recognizes 0bXXX binary constants
+Local patch added: OS_main and OS_task attributes
 
 Locally added support for the following AVR devices:
 
   ATtiny43U
-  ATtiny48
+  ATtiny48/88
   AT90PWM2B/PWM3B
   AT90PWM216/PWM316
   ATmega48P/88P/168P/328P
+  ATmega32HVB
+  ATmega1284
   ATmega2560/ATmega2561
 
 WWW: http://gcc.gnu.org/