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Diffstat (limited to 'cad/verilog-mode.el/pkg-descr')
| -rw-r--r-- | cad/verilog-mode.el/pkg-descr | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/cad/verilog-mode.el/pkg-descr b/cad/verilog-mode.el/pkg-descr index 3b1cd432f249..21bddb3f6125 100644 --- a/cad/verilog-mode.el/pkg-descr +++ b/cad/verilog-mode.el/pkg-descr @@ -6,5 +6,4 @@ Recent versions allow you to insert AUTOS in non-AUTO designs, so IP interconnect can be easily modified. You can also expand Verilog-2001 ".*" instantiations, to see what ports will be connected by simulators. -Author: Michael McNamara <mac@verilog.com>, Wilson Snyder <wsnyder@wsnyder.org> WWW: http://www.veripool.org/wiki/verilog-mode |