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-rw-r--r--cad/p5-Verilog-Perl/Makefile2
1 files changed, 2 insertions, 0 deletions
diff --git a/cad/p5-Verilog-Perl/Makefile b/cad/p5-Verilog-Perl/Makefile
index 6889a0f20a2f..4062d1c56b81 100644
--- a/cad/p5-Verilog-Perl/Makefile
+++ b/cad/p5-Verilog-Perl/Makefile
@@ -22,6 +22,8 @@ USE_BISON= build
PERL_CONFIGURE= yes
+BROKEN= Does not compile
+
MAN1= vhier.1 vpassert.1 vppreproc.1 vrename.1
MAN3= Verilog::EditFiles.3 Verilog::Netlist::Logger.3 \