diff options
Diffstat (limited to 'cad')
| -rw-r--r-- | cad/alliance/Makefile | 7 | ||||
| -rw-r--r-- | cad/brlcad/Makefile | 2 | ||||
| -rw-r--r-- | cad/iverilog/Makefile | 9 | ||||
| -rw-r--r-- | cad/opencascade/Makefile | 2 | ||||
| -rw-r--r-- | cad/p5-Verilog-Perl/Makefile | 8 |
5 files changed, 8 insertions, 20 deletions
diff --git a/cad/alliance/Makefile b/cad/alliance/Makefile index 7c372d46faf1..9d11db4774f9 100644 --- a/cad/alliance/Makefile +++ b/cad/alliance/Makefile @@ -1,7 +1,4 @@ -# New ports collection makefile for: alliance -# Date created: 6 May 2004 -# Whom: hrs -# +# Created by: hrs # $FreeBSD$ PORTNAME= alliance @@ -23,7 +20,7 @@ WRKSRC= ${WRKDIR}/${PORTNAME}-5.0 SUB_FILES= pkg-message PKGMESSAGE= ${WRKDIR}/pkg-message -USE_BISON= build +USES= bison USE_GMAKE= yes USE_MOTIF= yes diff --git a/cad/brlcad/Makefile b/cad/brlcad/Makefile index 0ae1599b30e3..5818bd19fb46 100644 --- a/cad/brlcad/Makefile +++ b/cad/brlcad/Makefile @@ -26,7 +26,7 @@ USE_GL= gl glu USE_XORG= ice inputproto sm x11 xau xdamage xdmcp xext xfixes xft xi \ xproto xrender xscrnsaver xt xxf86vm USE_GMAKE= yes -USE_BISON= build +USES= bison USE_TCL= 85 USE_TK= 85 USE_LDCONFIG= yes diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile index 434e12e917b3..cda7640bd86e 100644 --- a/cad/iverilog/Makefile +++ b/cad/iverilog/Makefile @@ -1,10 +1,5 @@ -# ex:ts=8 -# New ports collection makefile for: iverilog -# Date created: Feb 13, 2001 -# Whom: Ying-Chieh Liao <ijliao@FreeBSD.org> -# +# Created by: Ying-Chieh Liao <ijliao@FreeBSD.org> # $FreeBSD$ -# PORTNAME= iverilog PORTVERSION= 0.9.6 @@ -19,7 +14,7 @@ COMMENT= A Verilog simulation and synthesis tool LICENSE= GPLv2 GNU_CONFIGURE= yes -USE_BISON= build +USES= bison USE_GMAKE= yes CONFIGURE_ARGS= --disable-suffix diff --git a/cad/opencascade/Makefile b/cad/opencascade/Makefile index 9154c5b5a545..9614e3e1af74 100644 --- a/cad/opencascade/Makefile +++ b/cad/opencascade/Makefile @@ -22,7 +22,7 @@ LIB_DEPENDS= itcl.${ITCL_VER}:${PORTSDIR}/lang/itcl \ dps.0:${PORTSDIR}/x11/dgs USE_BZIP2= yes -USE_BISON= build +USES= bison USE_TK= 84+ USE_TCL_BUILD= 84+ USE_TCL_RUN= 84+ diff --git a/cad/p5-Verilog-Perl/Makefile b/cad/p5-Verilog-Perl/Makefile index 12cd351b9e15..7d278e74d71f 100644 --- a/cad/p5-Verilog-Perl/Makefile +++ b/cad/p5-Verilog-Perl/Makefile @@ -1,9 +1,5 @@ -# New ports collection makefile for: Verilog-Perl -# Date created: 11 Apr 2009 -# Whom: Otacilio de Araujo Ramos Neto <otacilio.neto@ee.ufcg.edu.br> -# +# Created by: Otacilio de Araujo Ramos Neto <otacilio.neto@ee.ufcg.edu.br> # $FreeBSD$ -# PORTNAME= Verilog-Perl PORTVERSION= 3.316 @@ -18,7 +14,7 @@ BUILD_DEPENDS= flex>=2.5.35:${PORTSDIR}/textproc/flex USE_GMAKE= yes USE_PERL5= yes -USE_BISON= build +USES= bison PERL_CONFIGURE= yes |