aboutsummaryrefslogtreecommitdiffstats
path: root/cad/Makefile
Commit message (Expand)AuthorAgeFilesLines
* As announced on May 6, remove the broken sis port.kris2003-08-081-1/+0
* As announced on May 6, remove the broken pisces port.kris2003-08-081-1/+0
* Add gmsh 1.45.1, an automatic 3D finite element mesh generator.oliver2003-07-231-0/+1
* Add astk-client , graphical interface for Code_Aster (client side).oliver2003-07-231-0/+1
* Add astk-serveur 1.0.14,oliver2003-07-231-0/+1
* Add metis-edf 3, meshes partionning tool used by Code_Aster.oliver2003-07-231-0/+1
* Add new port cad/tochnogmaho2003-07-131-0/+1
* NEW port CAD/varkonedwin2003-05-211-0/+1
* A Three-Dimensional Structural Finite Element Programmaho2003-05-051-0/+1
* add ziarc 20020729ijliao2003-02-101-0/+1
* add chipvault 200211ijliao2003-01-291-0/+1
* new port: cad/gwaveedwin2003-01-191-0/+1
* New port atlc version 4.0.1: A tool to calculate the impedance oflioux2002-11-141-0/+1
* New port cascade version 1.4: A simple tool to analyze noise andlioux2002-11-141-0/+1
* add geda-utilsijliao2002-10-111-0/+1
* add geda-symcheckijliao2002-10-111-0/+1
* add transcalc 0.13ijliao2002-09-061-0/+1
* add gerbv 0.0.9ijliao2002-07-161-0/+1
* Remove acs. Its successor, gnucap, is already in the tree.tg2002-06-271-1/+0
* add gtkwave 2.0.0p1ijliao2002-05-121-0/+1
* add qfsm 0.30ijliao2002-04-121-0/+1
* Add leocad 0.73, a CAD program that uses bricks similar to thosepetef2002-03-031-0/+1
* Initial import of ngspice_reworkkevlo2002-02-091-0/+1
* add slffea 1.25ijliao2002-02-091-0/+1
* add gnucap 0.30ijliao2002-02-071-0/+1
* Add linux-eagle , an easy to use, yet powerful tool for designingsobomax2001-12-271-0/+1
* add qmlsijliao2001-12-101-0/+1
* add pdnmeshijliao2001-10-151-0/+1
* gEDA electronic schematic capture toolsvanilla2001-04-071-0/+1
* gEDA electronic schematic capture toolsvanilla2001-04-071-0/+1
* geda-symbols is the basic component of geda package.vanilla2001-04-071-0/+1
* libgeda is a a base library common to all the gEDA toolsvanilla2001-04-071-0/+1
* add vipecijliao2001-04-031-0/+1
* Add oregano, schematic capture and simulation of electrical circuits.knu2001-03-071-0/+1
* add iverilog, a Verilog simulation and synthesis toolijliao2001-02-131-0/+1
* SCEPTRE (System for Circuit Evaluation and Prediction of Transientgrog2001-02-111-0/+1
* Activate Electric.sada2000-07-301-0/+1
* Add PISCES, a two-dimensional device simulator which includesade2000-05-031-0/+1
* cider version 1b1steve1999-12-251-0/+1
* New port QCad, a 2D-CAD program. Uses Qt-2.tg1999-12-221-0/+1
* Change Id->FreeBSD.obrien1999-08-251-1/+1
* Activate the tkgate port.steve1999-06-071-1/+2
* Sort entries. In particular, "large", "medium", "small" sort in this order,asami1998-12-071-2/+2
* Activate geda.vanilla1998-12-061-1/+2
* Enable sis, a new circuit emulator port.ghelmer1998-07-011-1/+2
* Activate xcircuit.mph1998-05-181-1/+2
* Activate kaskade.tg1997-11-171-1/+2
* Add felt.asami1997-01-151-1/+2
* Turn on mars and lprpsobrien1996-11-251-1/+2
* Add spice.tg1996-05-231-1/+2
* Add chipmunk, convert to new format along the way.asami1995-08-251-2/+6
* Clean up subdir Makefiles. They now all look like this:asami1995-05-141-1/+2
* Alphabetize.jkh1995-01-131-2/+2
* New cad groupjkh1995-01-131-0/+5