From 78a9dae7f500660bd8f45720f6380475bbf83f14 Mon Sep 17 00:00:00 2001 From: maho Date: Wed, 1 Sep 2004 14:26:13 +0000 Subject: ad hoc fix for 5-STABLE, having CPU other than Pentium4 (Opteron, Pentium III, Athlon... etc) this was due to recent change in make(1) --- math/atlas-devel/files/patch-config.c | 8 ++++++++ math/atlas/files/patch-config.c | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/math/atlas-devel/files/patch-config.c b/math/atlas-devel/files/patch-config.c index 57ccb7f1e1e7..455f38f38d0a 100644 --- a/math/atlas-devel/files/patch-config.c +++ b/math/atlas-devel/files/patch-config.c @@ -54,6 +54,14 @@ s1 = 0; s2 = 0; break; +@@ -2687,6 +2687,7 @@ + l1 = l2 = s1 = s2 = 0; + lf2 = 4096; + } ++ s1 = 0; // XXX always calculate L1 cache size + if (lvl == 1) + { + if (AmSure) *AmSure = s1; @@ -2799,7 +2803,7 @@ else if (strstr(ln, "ia64")) la = LAIA64; else if ( strstr(ln, "i686") || strstr(ln, "i586") || diff --git a/math/atlas/files/patch-config.c b/math/atlas/files/patch-config.c index 57ccb7f1e1e7..455f38f38d0a 100644 --- a/math/atlas/files/patch-config.c +++ b/math/atlas/files/patch-config.c @@ -54,6 +54,14 @@ s1 = 0; s2 = 0; break; +@@ -2687,6 +2687,7 @@ + l1 = l2 = s1 = s2 = 0; + lf2 = 4096; + } ++ s1 = 0; // XXX always calculate L1 cache size + if (lvl == 1) + { + if (AmSure) *AmSure = s1; @@ -2799,7 +2803,7 @@ else if (strstr(ln, "ia64")) la = LAIA64; else if ( strstr(ln, "i686") || strstr(ln, "i586") || -- cgit