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author | zeising <zeising@FreeBSD.org> | 2017-10-25 05:01:15 +0800 |
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committer | zeising <zeising@FreeBSD.org> | 2017-10-25 05:01:15 +0800 |
commit | f2a8b88e4d8b59ef66b36005a2c0a4f96691afa2 (patch) | |
tree | c0358a110555033db05a64a6eb04032879a97f63 /cad | |
parent | b18b68fdf3357e25a50052c1e4df718bd9f721f9 (diff) | |
download | freebsd-ports-gnome-f2a8b88e4d8b59ef66b36005a2c0a4f96691afa2.tar.gz freebsd-ports-gnome-f2a8b88e4d8b59ef66b36005a2c0a4f96691afa2.tar.zst freebsd-ports-gnome-f2a8b88e4d8b59ef66b36005a2c0a4f96691afa2.zip |
Update to 10.2
Diffstat (limited to 'cad')
-rw-r--r-- | cad/iverilog/Makefile | 7 | ||||
-rw-r--r-- | cad/iverilog/distinfo | 6 | ||||
-rw-r--r-- | cad/iverilog/files/patch-load_module.cc | 10 |
3 files changed, 6 insertions, 17 deletions
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile index 8658975c275e..45b025e3eedd 100644 --- a/cad/iverilog/Makefile +++ b/cad/iverilog/Makefile @@ -2,9 +2,9 @@ # $FreeBSD$ PORTNAME= iverilog -PORTVERSION= 10.1.1 +PORTVERSION= 10.2 CATEGORIES= cad -MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]\.[0-9]$,,}/ +MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v10/ DISTNAME= verilog-${PORTVERSION} MAINTAINER= zeising@FreeBSD.org @@ -14,8 +14,7 @@ LICENSE= GPLv2 GNU_CONFIGURE= yes CONFIGURE_ARGS= --disable-suffix -USES= bison gmake -MAKE_JOBS_UNSAFE= yes +USES= bison gmake readline .include <bsd.port.mk> diff --git a/cad/iverilog/distinfo b/cad/iverilog/distinfo index f4b35dbf8468..baaffb2c46b8 100644 --- a/cad/iverilog/distinfo +++ b/cad/iverilog/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1464367614 -SHA256 (verilog-10.1.1.tar.gz) = fdaa75dfe7c58cbc471fc12710ee49b3f32fd6cc055d9181b5190cbcbbd6cada -SIZE (verilog-10.1.1.tar.gz) = 1684925 +TIMESTAMP = 1508676832 +SHA256 (verilog-10.2.tar.gz) = 96dedbddb12d375edb45a144a926a3ba1e3e138d6598b18e7d79f2ae6de9e500 +SIZE (verilog-10.2.tar.gz) = 1695227 diff --git a/cad/iverilog/files/patch-load_module.cc b/cad/iverilog/files/patch-load_module.cc deleted file mode 100644 index 4fb17b221540..000000000000 --- a/cad/iverilog/files/patch-load_module.cc +++ /dev/null @@ -1,10 +0,0 @@ ---- load_module.cc.orig 2015-08-23 21:41:41 UTC -+++ load_module.cc -@@ -21,6 +21,7 @@ - # include "util.h" - # include "parse_api.h" - # include "compiler.h" -+# include <assert.h> - # include <iostream> - # include <map> - # include <cstdlib> |