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-rw-r--r--devel/Makefile1
-rw-r--r--devel/avr-gcc-42/Makefile63
-rw-r--r--devel/avr-gcc-42/distinfo6
-rw-r--r--devel/avr-gcc-42/files/patch-0b-constants144
-rw-r--r--devel/avr-gcc-42/files/patch-bug11259322
-rw-r--r--devel/avr-gcc-42/files/patch-bug2567213
-rw-r--r--devel/avr-gcc-42/files/patch-bug3024314
-rw-r--r--devel/avr-gcc-42/files/patch-constraint-desc33
-rw-r--r--devel/avr-gcc-42/files/patch-doc-progmem21
-rw-r--r--devel/avr-gcc-42/files/patch-dwarf10
-rw-r--r--devel/avr-gcc-42/files/patch-libiberty-Makefile.in12
-rw-r--r--devel/avr-gcc-42/files/patch-newdevices259
-rw-r--r--devel/avr-gcc-42/files/patch-os_main-os_task222
-rw-r--r--devel/avr-gcc-42/files/patch-zero_extend129
-rw-r--r--devel/avr-gcc-42/files/patch-zz-atmega256x361
-rw-r--r--devel/avr-gcc-42/pkg-descr22
-rw-r--r--devel/avr-gcc-42/pkg-plist106
17 files changed, 1738 insertions, 0 deletions
diff --git a/devel/Makefile b/devel/Makefile
index 939d7cf044dd..080fa4f541da 100644
--- a/devel/Makefile
+++ b/devel/Makefile
@@ -85,6 +85,7 @@
SUBDIR += avr-binutils
SUBDIR += avr-gcc
SUBDIR += avr-gcc-3
+ SUBDIR += avr-gcc-42
SUBDIR += avr-gdb
SUBDIR += avr-libc
SUBDIR += avra
diff --git a/devel/avr-gcc-42/Makefile b/devel/avr-gcc-42/Makefile
new file mode 100644
index 000000000000..1f8e0ea21392
--- /dev/null
+++ b/devel/avr-gcc-42/Makefile
@@ -0,0 +1,63 @@
+# New ports collection makefile for: avr-gcc-42
+# Date created: 17 Jun 2009
+# Whom: Joerg Wunsch <joerg@freebsd.org>
+#
+# $FreeBSD$
+#
+
+PORTNAME= gcc-42
+PORTVERSION= 4.2.4
+CATEGORIES= devel
+MASTER_SITES= ${MASTER_SITE_GCC}
+MASTER_SITES+= http://people.freebsd.org/~joerg/:local
+MASTER_SITE_SUBDIR= releases/gcc-${PORTVERSION}
+PKGNAMEPREFIX= avr-
+DISTFILES= gcc-core-${PORTVERSION}${EXTRACT_SUFX} \
+ gcc-g++-${PORTVERSION}${EXTRACT_SUFX}
+EXTRACT_ONLY= gcc-core-${PORTVERSION}${EXTRACT_SUFX} \
+ gcc-g++-${PORTVERSION}${EXTRACT_SUFX}
+
+MAINTAINER= joerg@freebsd.org
+COMMENT= FSF GCC 4.2.x for Atmel AVR 8-bit RISC cross-development
+
+BUILD_DEPENDS= avr-as:${PORTSDIR}/devel/avr-binutils \
+ avr-ld:${PORTSDIR}/devel/avr-binutils
+RUN_DEPENDS= avr-as:${PORTSDIR}/devel/avr-binutils \
+ avr-ld:${PORTSDIR}/devel/avr-binutils
+
+# GCC 4.x doesn't want to be built in its own source directory.
+WRKSRC= ${WRKDIR}/gcc-${PORTVERSION}
+BUILD_WRKSRC= ${WRKDIR}/build
+CONFIGURE_WRKSRC= ${BUILD_WRKSRC}
+INSTALL_WRKSRC= ${BUILD_WRKSRC}
+CONFIGURE_SCRIPT= ../gcc-${PORTVERSION}/configure
+NO_LATEST_LINK= Use devel/avr-gcc for a stable version.
+
+USE_PERL5_BUILD= yes
+USE_BZIP2= yes
+USE_GMAKE= yes
+USE_BISON= build
+GNU_CONFIGURE= yes
+
+.include <bsd.port.pre.mk>
+
+.if (${ARCH} == "amd64")
+ARCH= x86_64
+.endif
+
+CONFLICTS= avr-gcc-3* avr-gcc-4.*
+
+CONFIGURE_ARGS= --target=avr --disable-libssp
+
+MAKE_FLAGS= LANGUAGES="c c++"
+# get rid of that silly -mcpu=pentiumpro FreeBSD 5+ is so fond of. :-(
+MAKE_ENV= MACHINE_ARCH=avr
+
+MAN1= avr-cpp.1 avr-gcc.1 avr-g++.1 avr-gcov.1
+MAN7= fsf-funding.7 gfdl.7 gpl.7
+INFO= cpp gcc gccint cppinternals gccinstall
+
+post-extract:
+ cd ${WRKDIR} && ${MKDIR} build
+
+.include <bsd.port.post.mk>
diff --git a/devel/avr-gcc-42/distinfo b/devel/avr-gcc-42/distinfo
new file mode 100644
index 000000000000..f12a270e8f8c
--- /dev/null
+++ b/devel/avr-gcc-42/distinfo
@@ -0,0 +1,6 @@
+MD5 (gcc-core-4.2.4.tar.bz2) = b7a4c167f6a05301591b139b356e36d0
+SHA256 (gcc-core-4.2.4.tar.bz2) = cfc9e7e14966097d24d510cfd905515e8f7464ab5379a50698ae3d88e1f7a532
+SIZE (gcc-core-4.2.4.tar.bz2) = 18927613
+MD5 (gcc-g++-4.2.4.tar.bz2) = 28c15a2b9cdfd3f9abb3635d06eb5c63
+SHA256 (gcc-g++-4.2.4.tar.bz2) = afdb525e6c93aed4da2ee19b9e4e4896cf6f1a7590621cce640f6310d98c083f
+SIZE (gcc-g++-4.2.4.tar.bz2) = 4823317
diff --git a/devel/avr-gcc-42/files/patch-0b-constants b/devel/avr-gcc-42/files/patch-0b-constants
new file mode 100644
index 000000000000..3f21cb6fdbaf
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-0b-constants
@@ -0,0 +1,144 @@
+--- ./gcc/doc/extend.texi.orig Sat Aug 6 15:26:27 2005
++++ ./gcc/doc/extend.texi Mon Aug 22 00:14:05 2005
+@@ -79,6 +79,7 @@
+ * Pragmas:: Pragmas accepted by GCC.
+ * Unnamed Fields:: Unnamed struct/union fields within structs/unions.
+ * Thread-Local:: Per-thread variables.
++* Binary constants:: Binary constants using the @samp{0b} prefix.
+ @end menu
+
+ @node Statement Exprs
+@@ -9742,6 +9743,28 @@
+ Non-@code{static} members shall not be @code{__thread}.
+ @end quotation
+ @end itemize
++
++@node Binary constants
++@section Binary constants using the @samp{0b} prefix
++@cindex Binary constants using the @samp{0b} prefix
++
++Integer constants can be written as binary constants, consisting of a
++sequence of @samp{0} and @samp{1} digits, prefixed by @samp{0b} or
++@samp{0B}. This is particularly useful in environments that operate a
++lot on the bit-level (like microcontrollers).
++
++The following statements are identical:
++
++@smallexample
++i = 42;
++i = 0x2a;
++i = 052;
++i = 0b101010;
++@end smallexample
++
++The type of these constants follows the same rules as for octal or
++hexadecimal integer constants, so suffixes like @samp{L} or @samp{UL}
++can be applied.
+
+ @node C++ Extensions
+ @chapter Extensions to the C++ Language
+--- ./libcpp/include/cpplib.h.orig Wed Jun 29 04:34:39 2005
++++ ./libcpp/include/cpplib.h Mon Aug 22 00:14:05 2005
+@@ -729,6 +729,7 @@
+ #define CPP_N_DECIMAL 0x0100
+ #define CPP_N_HEX 0x0200
+ #define CPP_N_OCTAL 0x0400
++#define CPP_N_BINARY 0x0800
+
+ #define CPP_N_UNSIGNED 0x1000 /* Properties. */
+ #define CPP_N_IMAGINARY 0x2000
+--- ./libcpp/expr.c.orig Wed Jun 29 04:34:36 2005
++++ ./libcpp/expr.c Mon Aug 22 12:02:28 2005
+@@ -171,6 +171,11 @@
+ radix = 16;
+ str++;
+ }
++ else if ((*str == 'b' || *str == 'B') && (str[1] == '0' || str[1] == '1'))
++ {
++ radix = 2;
++ str++;
++ }
+ }
+
+ /* Now scan for a well-formed integer or float. */
+@@ -209,10 +214,22 @@
+ radix = 10;
+
+ if (max_digit >= radix)
+- SYNTAX_ERROR2 ("invalid digit \"%c\" in octal constant", '0' + max_digit);
++ {
++ if (radix == 2)
++ SYNTAX_ERROR2 ("invalid digit \"%c\" in binary constant", '0' + max_digit);
++ else
++ SYNTAX_ERROR2 ("invalid digit \"%c\" in octal constant", '0' + max_digit);
++ }
+
+ if (float_flag != NOT_FLOAT)
+ {
++ if (radix == 2)
++ {
++ cpp_error (pfile, CPP_DL_ERROR,
++ "invalid prefix \"0b\" for floating constant");
++ return CPP_N_INVALID;
++ }
++
+ if (radix == 16 && CPP_PEDANTIC (pfile) && !CPP_OPTION (pfile, c99))
+ cpp_error (pfile, CPP_DL_PEDWARN,
+ "use of C99 hexadecimal floating constant");
+@@ -288,11 +305,16 @@
+ if ((result & CPP_N_IMAGINARY) && CPP_PEDANTIC (pfile))
+ cpp_error (pfile, CPP_DL_PEDWARN,
+ "imaginary constants are a GCC extension");
++ if (radix == 2 && CPP_PEDANTIC (pfile))
++ cpp_error (pfile, CPP_DL_PEDWARN,
++ "binary constants are a GCC extension");
+
+ if (radix == 10)
+ result |= CPP_N_DECIMAL;
+ else if (radix == 16)
+ result |= CPP_N_HEX;
++ else if (radix == 2)
++ result |= CPP_N_BINARY;
+ else
+ result |= CPP_N_OCTAL;
+
+@@ -343,6 +365,11 @@
+ base = 16;
+ p += 2;
+ }
++ else if ((type & CPP_N_RADIX) == CPP_N_BINARY)
++ {
++ base = 2;
++ p += 2;
++ }
+
+ /* We can add a digit to numbers strictly less than this without
+ needing the precision and slowness of double integers. */
+@@ -398,12 +425,25 @@
+ append_digit (cpp_num num, int digit, int base, size_t precision)
+ {
+ cpp_num result;
+- unsigned int shift = 3 + (base == 16);
++ unsigned int shift;
+ bool overflow;
+ cpp_num_part add_high, add_low;
+
+- /* Multiply by 8 or 16. Catching this overflow here means we don't
++ /* Multiply by 2, 8 or 16. Catching this overflow here means we don't
+ need to worry about add_high overflowing. */
++ switch (base)
++ {
++ case 2:
++ shift = 1;
++ break;
++
++ case 16:
++ shift = 4;
++ break;
++
++ default:
++ shift = 3;
++ }
+ overflow = !!(num.high >> (PART_PRECISION - shift));
+ result.high = num.high << shift;
+ result.low = num.low << shift;
diff --git a/devel/avr-gcc-42/files/patch-bug11259 b/devel/avr-gcc-42/files/patch-bug11259
new file mode 100644
index 000000000000..0ef47881fe62
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-bug11259
@@ -0,0 +1,322 @@
+--- gcc/config/avr/avr.md.orig 2007-09-01 19:28:30.000000000 +0400
++++ gcc/config/avr/avr.md 2007-11-08 02:37:48.828125000 +0300
+@@ -39,21 +39,22 @@
+
+ (define_constants
+ [(REG_X 26)
+ (REG_Y 28)
+ (REG_Z 30)
+ (REG_W 24)
+ (REG_SP 32)
+ (TMP_REGNO 0) ; temporary register r0
+ (ZERO_REGNO 1) ; zero register r1
+ (UNSPEC_STRLEN 0)
+- (UNSPEC_INDEX_JMP 1)])
++ (UNSPEC_INDEX_JMP 1)
++ (UNSPEC_SWAP 4)])
+
+ (include "predicates.md")
+ (include "constraints.md")
+
+ ;; Condition code settings.
+ (define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber"
+ (const_string "none"))
+
+ (define_attr "type" "branch,branch1,arith,xcall"
+ (const_string "arith"))
+@@ -1044,20 +1045,33 @@
+ return (AS2 (andi, %A0,lo8(%2)) CR_TAB
+ AS2 (andi, %B0,hi8(%2)) CR_TAB
+ AS2 (andi, %C0,hlo8(%2)) CR_TAB
+ AS2 (andi, %D0,hhi8(%2)));
+ }
+ return \"bug\";
+ }"
+ [(set_attr "length" "4,4")
+ (set_attr "cc" "set_n,set_n")])
+
++(define_peephole2 ; andi
++ [(set (match_operand:QI 0 "d_register_operand" "")
++ (and:QI (match_dup 0)
++ (match_operand:QI 1 "const_int_operand" "")))
++ (set (match_dup 0)
++ (and:QI (match_dup 0)
++ (match_operand:QI 2 "const_int_operand" "")))]
++ ""
++ [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))]
++ {
++ operands[1] = GEN_INT (INTVAL (operands[1]) & INTVAL (operands[2]));
++ })
++
+ ;;|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
+ ;; ior
+
+ (define_insn "iorqi3"
+ [(set (match_operand:QI 0 "register_operand" "=r,d")
+ (ior:QI (match_operand:QI 1 "register_operand" "%0,0")
+ (match_operand:QI 2 "nonmemory_operand" "r,i")))]
+ ""
+ "@
+ or %0,%2
+@@ -1172,24 +1186,71 @@
+ (xor:SI (match_operand:SI 1 "register_operand" "%0")
+ (match_operand:SI 2 "register_operand" "r")))]
+ ""
+ "eor %0,%2
+ eor %B0,%B2
+ eor %C0,%C2
+ eor %D0,%D2"
+ [(set_attr "length" "4")
+ (set_attr "cc" "set_n")])
+
++;; swap
++
++(define_insn "*swap"
++ [(set (match_operand:QI 0 "register_operand" "=r")
++ (unspec:QI [(match_operand:QI 1 "register_operand" "0")]
++ UNSPEC_SWAP))]
++ ""
++ "swap %0"
++ [(set_attr "length" "1")
++ (set_attr "cc" "none")])
++
+ ;;<< << << << << << << << << << << << << << << << << << << << << << << << << <<
+ ;; arithmetic shift left
+
+-(define_insn "ashlqi3"
++(define_expand "ashlqi3"
++ [(set (match_operand:QI 0 "register_operand" "")
++ (ashift:QI (match_operand:QI 1 "register_operand" "")
++ (match_operand:QI 2 "general_operand" "")))]
++ ""
++ "")
++
++(define_split ; ashlqi3_const4
++ [(set (match_operand:QI 0 "d_register_operand" "")
++ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
++ (const_int 4)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (and:QI (match_dup 0) (const_int -16)))]
++ "")
++
++(define_split ; ashlqi3_const5
++ [(set (match_operand:QI 0 "d_register_operand" "")
++ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
++ (const_int 5)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
++ (set (match_dup 0) (and:QI (match_dup 0) (const_int -32)))]
++ "")
++
++(define_split ; ashlqi3_const6
++ [(set (match_operand:QI 0 "d_register_operand" "")
++ (ashift:QI (match_operand:QI 1 "d_register_operand" "")
++ (const_int 6)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
++ (set (match_dup 0) (and:QI (match_dup 0) (const_int -64)))]
++ "")
++
++(define_insn "*ashlqi3"
+ [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r")
+ (ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
+ (match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))]
+ ""
+ "* return ashlqi3_out (insn, operands, NULL);"
+ [(set_attr "length" "5,0,1,2,4,6,9")
+ (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
+
+ (define_insn "ashlhi3"
+ [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
+@@ -1205,20 +1266,61 @@
+ (ashift:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
+ (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
+ ""
+ "* return ashlsi3_out (insn, operands, NULL);"
+ [(set_attr "length" "8,0,4,4,8,10,12")
+ (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
+
+ ;; Optimize if a scratch register from LD_REGS happens to be available.
+
+ (define_peephole2
++ [(match_scratch:QI 2 "d")
++ (set (match_operand:QI 0 "l_register_operand" "")
++ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
++ (const_int 4)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 2) (const_int -16))
++ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++ (clobber (match_dup 2))]
++ "if (!avr_peep2_scratch_safe (operands[2]))
++ FAIL;")
++
++(define_peephole2
++ [(match_scratch:QI 2 "d")
++ (set (match_operand:QI 0 "l_register_operand" "")
++ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
++ (const_int 5)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 1)))
++ (set (match_dup 2) (const_int -32))
++ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++ (clobber (match_dup 2))]
++ "if (!avr_peep2_scratch_safe (operands[2]))
++ FAIL;")
++
++(define_peephole2
++ [(match_scratch:QI 2 "d")
++ (set (match_operand:QI 0 "l_register_operand" "")
++ (ashift:QI (match_operand:QI 1 "l_register_operand" "")
++ (const_int 6)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (ashift:QI (match_dup 0) (const_int 2)))
++ (set (match_dup 2) (const_int -64))
++ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++ (clobber (match_dup 2))]
++ "if (!avr_peep2_scratch_safe (operands[2]))
++ FAIL;")
++
++(define_peephole2
+ [(match_scratch:QI 3 "d")
+ (set (match_operand:HI 0 "register_operand" "")
+ (ashift:HI (match_operand:HI 1 "register_operand" "")
+ (match_operand:QI 2 "const_int_operand" "")))]
+ ""
+ [(parallel [(set (match_dup 0) (ashift:HI (match_dup 1) (match_dup 2)))
+ (clobber (match_dup 3))])]
+ "if (!avr_peep2_scratch_safe (operands[3]))
+ FAIL;")
+
+@@ -1323,21 +1425,63 @@
+ (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
+ (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
+ "reload_completed"
+ "* return ashrsi3_out (insn, operands, NULL);"
+ [(set_attr "length" "0,4,4,10")
+ (set_attr "cc" "none,clobber,set_n,clobber")])
+
+ ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
+ ;; logical shift right
+
+-(define_insn "lshrqi3"
++(define_expand "lshrqi3"
++ [(set (match_operand:QI 0 "register_operand" "")
++ (lshiftrt:QI (match_operand:QI 1 "register_operand" "")
++ (match_operand:QI 2 "general_operand" "")))]
++ ""
++ "")
++
++(define_insn_and_split "*lshrqi3_const4"
++ [(set (match_operand:QI 0 "d_register_operand" "=d")
++ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++ (const_int 4)))]
++ ""
++ "#"
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (and:QI (match_dup 0) (const_int 15)))]
++ "")
++
++(define_insn_and_split "*lshrqi3_const5"
++ [(set (match_operand:QI 0 "d_register_operand" "=d")
++ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++ (const_int 5)))]
++ ""
++ "#"
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
++ (set (match_dup 0) (and:QI (match_dup 0) (const_int 7)))]
++ "")
++
++(define_insn_and_split "*lshrqi3_const6"
++ [(set (match_operand:QI 0 "d_register_operand" "=d")
++ (lshiftrt:QI (match_operand:QI 1 "d_register_operand" "0")
++ (const_int 6)))]
++ ""
++ "#"
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
++ (set (match_dup 0) (and:QI (match_dup 0) (const_int 3)))]
++ "")
++
++(define_insn "*lshrqi3"
+ [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r")
+ (lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
+ (match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))]
+ ""
+ "* return lshrqi3_out (insn, operands, NULL);"
+ [(set_attr "length" "5,0,1,2,4,6,9")
+ (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
+
+ (define_insn "lshrhi3"
+ [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
+@@ -1353,20 +1497,61 @@
+ (lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
+ (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))]
+ ""
+ "* return lshrsi3_out (insn, operands, NULL);"
+ [(set_attr "length" "8,0,4,4,8,10,12")
+ (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")])
+
+ ;; Optimize if a scratch register from LD_REGS happens to be available.
+
+ (define_peephole2
++ [(match_scratch:QI 2 "d")
++ (set (match_operand:QI 0 "l_register_operand" "")
++ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
++ (const_int 4)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 2) (const_int 15))
++ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++ (clobber (match_dup 2))]
++ "if (!avr_peep2_scratch_safe (operands[2]))
++ FAIL;")
++
++(define_peephole2
++ [(match_scratch:QI 2 "d")
++ (set (match_operand:QI 0 "l_register_operand" "")
++ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
++ (const_int 5)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 1)))
++ (set (match_dup 2) (const_int 7))
++ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++ (clobber (match_dup 2))]
++ "if (!avr_peep2_scratch_safe (operands[2]))
++ FAIL;")
++
++(define_peephole2
++ [(match_scratch:QI 2 "d")
++ (set (match_operand:QI 0 "l_register_operand" "")
++ (lshiftrt:QI (match_operand:QI 1 "l_register_operand" "")
++ (const_int 6)))]
++ ""
++ [(set (match_dup 0) (unspec:QI [(match_dup 0)] UNSPEC_SWAP))
++ (set (match_dup 0) (lshiftrt:QI (match_dup 0) (const_int 2)))
++ (set (match_dup 2) (const_int 3))
++ (set (match_dup 0) (and:QI (match_dup 0) (match_dup 2)))
++ (clobber (match_dup 2))]
++ "if (!avr_peep2_scratch_safe (operands[2]))
++ FAIL;")
++
++(define_peephole2
+ [(match_scratch:QI 3 "d")
+ (set (match_operand:HI 0 "register_operand" "")
+ (lshiftrt:HI (match_operand:HI 1 "register_operand" "")
+ (match_operand:QI 2 "const_int_operand" "")))]
+ ""
+ [(parallel [(set (match_dup 0) (lshiftrt:HI (match_dup 1) (match_dup 2)))
+ (clobber (match_dup 3))])]
+ "if (!avr_peep2_scratch_safe (operands[3]))
+ FAIL;")
+
diff --git a/devel/avr-gcc-42/files/patch-bug25672 b/devel/avr-gcc-42/files/patch-bug25672
new file mode 100644
index 000000000000..09fa118994db
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-bug25672
@@ -0,0 +1,13 @@
+http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25672
+
+--- Makefile.in.orig Thu Dec 15 19:02:02 2005
++++ Makefile.in Thu Apr 27 03:58:59 2006
+@@ -329,7 +329,7 @@
+ # CFLAGS will be just -g. We want to ensure that TARGET libraries
+ # (which we know are built with gcc) are built with optimizations so
+ # prepend -O2 when setting CFLAGS_FOR_TARGET.
+-CFLAGS_FOR_TARGET = -O2 $(CFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
++CFLAGS_FOR_TARGET = -O2 $(filter-out -march=% -mcpu=%,$(CFLAGS)) $(SYSROOT_CFLAGS_FOR_TARGET)
+ SYSROOT_CFLAGS_FOR_TARGET = @SYSROOT_CFLAGS_FOR_TARGET@
+ CXXFLAGS_FOR_TARGET = $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET)
+ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET)
diff --git a/devel/avr-gcc-42/files/patch-bug30243 b/devel/avr-gcc-42/files/patch-bug30243
new file mode 100644
index 000000000000..dcfa43dd6b66
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-bug30243
@@ -0,0 +1,14 @@
+Fix for GCC bug #30243.
+Index: gcc/builtins.c
+===================================================================
+--- gcc/builtins.c (revision 126457)
++++ gcc/builtins.c (working copy)
+@@ -5664,7 +5664,7 @@
+ lo = 0;
+ }
+
+- if (imode != rmode)
++ if (imode > rmode)
+ temp = gen_lowpart (rmode, temp);
+ temp = expand_binop (rmode, and_optab, temp,
+ immed_double_const (lo, hi, rmode),
diff --git a/devel/avr-gcc-42/files/patch-constraint-desc b/devel/avr-gcc-42/files/patch-constraint-desc
new file mode 100644
index 000000000000..b8be9478a4b6
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-constraint-desc
@@ -0,0 +1,33 @@
+
+2007-07-03 Eric Weddington <eweddington@cso.atmel.com>
+
+ * config/avr/constraints.md (define_memory_constraint "Q"): Fix
+ the constraint description.
+ * doc/md.texi: Update documentation of AVR constraints.
+
+=======================================
+--- gcc/config/avr/constraints.md.old 2007-05-19 04:59:17.000000000 -0600
++++ gcc/config/avr/constraints.md 2007-07-03 14:47:28.007933000 -0600
+@@ -105,6 +105,6 @@
+ (match_test "ival >= -6 && ival <= 5")))
+
+ (define_memory_constraint "Q"
+- "A memory address based on X or Y pointer with displacement."
++ "A memory address based on Y or Z pointer with displacement."
+ (and (match_code "mem")
+ (match_test "extra_constraint_Q (op)")))
+--- gcc/doc/md.texi.old 2007-05-28 19:12:58.000000000 -0600
++++ gcc/doc/md.texi 2007-07-03 16:56:26.157051800 -0600
+@@ -1742,6 +1742,12 @@ Constant integer 1
+
+ @item G
+ A floating point constant 0.0
++
++@item R
++Integer constant in the range -6 @dots{} 5.
++
++@item Q
++A memory address based on Y or Z pointer with displacement.
+ @end table
+
+ @item CRX Architecture---@file{config/crx/crx.h}
diff --git a/devel/avr-gcc-42/files/patch-doc-progmem b/devel/avr-gcc-42/files/patch-doc-progmem
new file mode 100644
index 000000000000..858a7fbc8245
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-doc-progmem
@@ -0,0 +1,21 @@
+Patch to document the AVR progmem attribute.
+===========================================
+--- gcc/doc/extend.texi.old 2007-07-17 18:32:37.390625000 -0600
++++ gcc/doc/extend.texi 2007-07-18 07:59:47.218750000 -0600
+@@ -3623,6 +3623,16 @@ placed in either the @code{.bss_below100
+
+ @end table
+
++@subsection AVR Variable Attributes
++
++@table @code
++@item progmem
++@cindex @code{progmem} variable attribute
++The @code{progmem} attribute is used on the AVR to place data in the Program
++Memory address space. The AVR is a Harvard Architecture processor and data
++normally resides in the Data Memory address space.
++@end table
++
+ @node Type Attributes
+ @section Specifying Attributes of Types
+ @cindex attribute of types
diff --git a/devel/avr-gcc-42/files/patch-dwarf b/devel/avr-gcc-42/files/patch-dwarf
new file mode 100644
index 000000000000..316080d37166
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-dwarf
@@ -0,0 +1,10 @@
+--- gcc/config/avr/avr.h.orig 2006-04-13 15:31:19.000000000 +0200
++++ gcc/config/avr/avr.h 2006-04-13 16:23:16.000000000 +0200
+@@ -892,3 +892,7 @@
+ #define ZERO_REGNO 1
+
++#define DWARF2_DEBUGGING_INFO 1
+ #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
++
++/* Offset from the frame pointer register value to the top of the stack. */
++#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
diff --git a/devel/avr-gcc-42/files/patch-libiberty-Makefile.in b/devel/avr-gcc-42/files/patch-libiberty-Makefile.in
new file mode 100644
index 000000000000..0e0b3ce31173
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-libiberty-Makefile.in
@@ -0,0 +1,12 @@
+--- libiberty/Makefile.in.orig Mon Sep 26 22:55:10 2005
++++ libiberty/Makefile.in Wed Mar 22 22:13:44 2006
+@@ -275,7 +275,8 @@
+ @MAINT@ echo stamp > stamp-functions
+
+ INSTALL_DEST = @INSTALL_DEST@
+-install: install_to_$(INSTALL_DEST) install-subdir
++#install: install_to_$(INSTALL_DEST) install-subdir
++install:
+
+ install_to_libdir: all
+ ${mkinstalldirs} $(DESTDIR)$(libdir)$(MULTISUBDIR)
diff --git a/devel/avr-gcc-42/files/patch-newdevices b/devel/avr-gcc-42/files/patch-newdevices
new file mode 100644
index 000000000000..69b147a035eb
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-newdevices
@@ -0,0 +1,259 @@
+--- gcc/config/avr/avr.c.orig Sat Sep 1 17:28:30 2007
++++ gcc/config/avr/avr.c Wed Dec 19 14:02:11 2007
+@@ -204,6 +206,9 @@
+ { "attiny261", ARCH_AVR25, "__AVR_ATtiny261__" },
+ { "attiny461", ARCH_AVR25, "__AVR_ATtiny461__" },
+ { "attiny861", ARCH_AVR25, "__AVR_ATtiny861__" },
++ { "attiny43u", ARCH_AVR25, "__AVR_ATtiny43U__" },
++ { "attiny48", ARCH_AVR25, "__AVR_ATtiny48__" },
++ { "attiny88", ARCH_AVR25, "__AVR_ATtiny88__" },
+ { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__" },
+ /* Classic, > 8K. */
+ { "avr3", ARCH_AVR3, NULL },
+@@ -212,14 +217,18 @@
+ /* Enhanced, <= 8K. */
+ { "avr4", ARCH_AVR4, NULL },
+ { "atmega8", ARCH_AVR4, "__AVR_ATmega8__" },
+ { "atmega48", ARCH_AVR4, "__AVR_ATmega48__" },
++ { "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__" },
+ { "atmega88", ARCH_AVR4, "__AVR_ATmega88__" },
++ { "atmega88p", ARCH_AVR4, "__AVR_ATmega88P__" },
+ { "atmega8515", ARCH_AVR4, "__AVR_ATmega8515__" },
+ { "atmega8535", ARCH_AVR4, "__AVR_ATmega8535__" },
+ { "atmega8hva", ARCH_AVR4, "__AVR_ATmega8HVA__" },
+ { "at90pwm1", ARCH_AVR4, "__AVR_AT90PWM1__" },
+ { "at90pwm2", ARCH_AVR4, "__AVR_AT90PWM2__" },
++ { "at90pwm2b", ARCH_AVR4, "__AVR_AT90PWM2B__" },
+ { "at90pwm3", ARCH_AVR4, "__AVR_AT90PWM3__" },
++ { "at90pwm3b", ARCH_AVR4, "__AVR_AT90PWM3B__" },
+ /* Enhanced, > 8K. */
+ { "avr5", ARCH_AVR5, NULL },
+ { "atmega16", ARCH_AVR5, "__AVR_ATmega16__" },
+@@ -233,6 +246,7 @@
+ { "atmega165", ARCH_AVR5, "__AVR_ATmega165__" },
+ { "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__" },
+ { "atmega168", ARCH_AVR5, "__AVR_ATmega168__" },
++ { "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__" },
+ { "atmega169", ARCH_AVR5, "__AVR_ATmega169__" },
+ { "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__" },
+ { "atmega32", ARCH_AVR5, "__AVR_ATmega32__" },
+@@ -242,10 +256,12 @@
+ { "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__" },
+ { "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__" },
+ { "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__" },
++ { "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__" },
+ { "atmega329", ARCH_AVR5, "__AVR_ATmega329__" },
+ { "atmega329p", ARCH_AVR5, "__AVR_ATmega329P__" },
+ { "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__" },
+ { "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__" },
++ { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__" },
+ { "atmega406", ARCH_AVR5, "__AVR_ATmega406__" },
+ { "atmega64", ARCH_AVR5, "__AVR_ATmega64__" },
+ { "atmega640", ARCH_AVR5, "__AVR_ATmega640__" },
+@@ -258,10 +274,13 @@
+ { "atmega128", ARCH_AVR5, "__AVR_ATmega128__" },
+ { "atmega1280", ARCH_AVR5, "__AVR_ATmega1280__" },
+ { "atmega1281", ARCH_AVR5, "__AVR_ATmega1281__" },
++ { "atmega1284p", ARCH_AVR5, "__AVR_ATmega1284P__" },
+ { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__" },
+ { "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__" },
+ { "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__" },
+ { "at90can128", ARCH_AVR5, "__AVR_AT90CAN128__" },
++ { "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__" },
++ { "at90pwm316", ARCH_AVR5, "__AVR_AT90PWM316__" },
+ { "at90usb646", ARCH_AVR5, "__AVR_AT90USB646__" },
+ { "at90usb647", ARCH_AVR5, "__AVR_AT90USB647__" },
+ { "at90usb1286", ARCH_AVR5, "__AVR_AT90USB1286__" },
+
+--- gcc/config/avr/t-avr.orig Fri Apr 27 22:53:57 2007
++++ gcc/config/avr/t-avr Wed Dec 19 14:01:08 2007
+@@ -53,23 +53,30 @@
+ mmcu?avr25=mmcu?attiny261 \
+ mmcu?avr25=mmcu?attiny461 \
+ mmcu?avr25=mmcu?attiny861 \
++ mmcu?avr25=mmcu?attiny43u \
++ mmcu?avr25=mmcu?attiny48 \
++ mmcu?avr25=mmcu?attiny88 \
+ mmcu?avr25=mmcu?at86rf401 \
+ mmcu?avr3=mmcu?atmega103 \
+ mmcu?avr3=mmcu?atmega603 \
+ mmcu?avr3=mmcu?at43usb320 \
+ mmcu?avr3=mmcu?at43usb355 \
+ mmcu?avr3=mmcu?at76c711 \
+ mmcu?avr35=mmcu?at90usb82 \
+ mmcu?avr35=mmcu?at90usb162 \
+ mmcu?avr4=mmcu?atmega48 \
++ mmcu?avr4=mmcu?atmega48p \
+ mmcu?avr4=mmcu?atmega8 \
+ mmcu?avr4=mmcu?atmega8515 \
+ mmcu?avr4=mmcu?atmega8535 \
+ mmcu?avr4=mmcu?atmega88 \
++ mmcu?avr4=mmcu?atmega88p \
+ mmcu?avr4=mmcu?atmega8hva \
+ mmcu?avr4=mmcu?at90pwm1 \
+ mmcu?avr4=mmcu?at90pwm2 \
++ mmcu?avr4=mmcu?at90pwm2b \
+ mmcu?avr4=mmcu?at90pwm3 \
++ mmcu?avr4=mmcu?at90pwm3b \
+ mmcu?avr5=mmcu?atmega16 \
+ mmcu?avr5=mmcu?atmega161 \
+ mmcu?avr5=mmcu?atmega162 \
+@@ -76,6 +85,7 @@
+ mmcu?avr5=mmcu?atmega165 \
+ mmcu?avr5=mmcu?atmega165p \
+ mmcu?avr5=mmcu?atmega168 \
++ mmcu?avr5=mmcu?atmega168p \
+ mmcu?avr5=mmcu?atmega169 \
+ mmcu?avr5=mmcu?atmega169p \
+ mmcu?avr5=mmcu?atmega32 \
+@@ -85,10 +95,12 @@
+ mmcu?avr5=mmcu?atmega325p \
+ mmcu?avr5=mmcu?atmega3250 \
+ mmcu?avr5=mmcu?atmega3250p \
++ mmcu?avr5=mmcu?atmega328p \
+ mmcu?avr5=mmcu?atmega329 \
+ mmcu?avr5=mmcu?atmega329p \
+ mmcu?avr5=mmcu?atmega3290 \
+ mmcu?avr5=mmcu?atmega3290p \
++ mmcu?avr5=mmcu?atmega32hvb \
+ mmcu?avr5=mmcu?atmega406 \
+ mmcu?avr5=mmcu?atmega64 \
+ mmcu?avr5=mmcu?atmega640 \
+@@ -101,10 +113,13 @@
+ mmcu?avr5=mmcu?atmega128 \
+ mmcu?avr5=mmcu?atmega1280 \
+ mmcu?avr5=mmcu?atmega1281 \
++ mmcu?avr5=mmcu?atmega1284p \
+ mmcu?avr5=mmcu?atmega16hva \
+ mmcu?avr5=mmcu?at90can32 \
+ mmcu?avr5=mmcu?at90can64 \
+ mmcu?avr5=mmcu?at90can128 \
++ mmcu?avr5=mmcu?at90pwm216 \
++ mmcu?avr5=mmcu?at90pwm316 \
+ mmcu?avr5=mmcu?at90usb646 \
+ mmcu?avr5=mmcu?at90usb647 \
+ mmcu?avr5=mmcu?at90usb1286 \
+
+--- gcc/config/avr/avr.h.orig Wed Dec 19 13:39:10 2007
++++ gcc/config/avr/avr.h Wed Dec 19 14:02:06 2007
+@@ -759,9 +759,13 @@
+ mmcu=at76*|\
+ mmcu=at90usb82|\
+ mmcu=at90usb162:-m avr3}\
+ %{mmcu=atmega8*|\
+- mmcu=atmega48|\
+- mmcu=at90pwm*:-m avr4}\
++ mmcu=atmega48*|\
++ mmcu=at90pwm1|\
++ mmcu=at90pwm2|\
++ mmcu=at90pwm2b|\
++ mmcu=at90pwm3|\
++ mmcu=at90pwm3b:-m avr4}\
+ %{mmcu=atmega16*|\
+ mmcu=atmega32*|\
+ mmcu=atmega406|\
+@@ -769,27 +769,34 @@
+ mmcu=atmega64*|\
+ mmcu=atmega128*|\
+ mmcu=at90can*|\
+- mmcu=at90usb64*|\
+- mmcu=at90usb128*|\
++ mmcu=at90pwm216|\
++ mmcu=at90pwm316|\
++ mmcu=at90usb6*|\
++ mmcu=at90usb12*|\
+ mmcu=at94k:-m avr5}\
+ %{mmcu=atmega324*|\
+ mmcu=atmega325*|\
++ mmcu=atmega328p|\
+ mmcu=atmega329*|\
+ mmcu=atmega406|\
+- mmcu=atmega48|\
+- mmcu=atmega88|\
++ mmcu=atmega48*|\
++ mmcu=atmega88*|\
+ mmcu=atmega64|\
+ mmcu=atmega644*|\
+ mmcu=atmega645*|\
+ mmcu=atmega649*|\
+ mmcu=atmega128|\
++ mmcu=atmega1284p|\
+ mmcu=atmega162|\
+ mmcu=atmega164*|\
+ mmcu=atmega165*|\
+- mmcu=atmega168|\
++ mmcu=atmega168*|\
+ mmcu=atmega169*|\
+ mmcu=atmega8hva|\
+ mmcu=atmega16hva|\
++ mmcu=atmega32hvb|\
++ mmcu=attiny48|\
++ mmcu=attiny88|\
+ mmcu=at90can*|\
+ mmcu=at90pwm*|\
+ mmcu=at90usb*: -Tdata 0x800100}\
+@@ -839,6 +853,9 @@
+ %{mmcu=attiny261:crttn261.o%s} \
+ %{mmcu=attiny461:crttn461.o%s} \
+ %{mmcu=attiny861:crttn861.o%s} \
++%{mmcu=attiny43u:crttn43u.o%s} \
++%{mmcu=attiny48:crttn48.o%s} \
++%{mmcu=attiny88:crttn88.o%s} \
+ %{mmcu=atmega103|mmcu=avr3:crtm103.o%s} \
+ %{mmcu=atmega603:crtm603.o%s} \
+ %{mmcu=at43usb320:crt43320.o%s} \
+@@ -846,14 +863,18 @@
+ %{mmcu=at76c711:crt76711.o%s} \
+ %{mmcu=at90usb162|mmcu=avr35:crtusb162.o%s} \
+ %{mmcu=at90usb82:crtusb82.o%s} \
+ %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
+ %{mmcu=atmega48:crtm48.o%s} \
++%{mmcu=atmega48p:crtm48p.o%s} \
+ %{mmcu=atmega88:crtm88.o%s} \
++%{mmcu=atmega88p:crtm88p.o%s} \
+ %{mmcu=atmega8515:crtm8515.o%s} \
+ %{mmcu=atmega8535:crtm8535.o%s} \
+ %{mmcu=at90pwm1:crt90pwm1.o%s} \
+ %{mmcu=at90pwm2:crt90pwm2.o%s} \
++%{mmcu=at90pwm2b:crt90pwm2b.o%s} \
+ %{mmcu=at90pwm3:crt90pwm3.o%s} \
++%{mmcu=at90pwm3b:crt90pwm3b.o%s} \
+ %{mmcu=atmega16:crtm16.o%s} \
+ %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
+ %{mmcu=atmega162:crtm162.o%s} \
+@@ -860,6 +881,7 @@
+ %{mmcu=atmega165:crtm165.o%s} \
+ %{mmcu=atmega165p:crtm165p.o%s} \
+ %{mmcu=atmega168:crtm168.o%s} \
++%{mmcu=atmega168p:crtm168p.o%s} \
+ %{mmcu=atmega169:crtm169.o%s} \
+ %{mmcu=atmega169p:crtm169p.o%s} \
+ %{mmcu=atmega32:crtm32.o%s} \
+@@ -869,10 +891,12 @@
+ %{mmcu=atmega325p:crtm325p.o%s} \
+ %{mmcu=atmega3250:crtm3250.o%s} \
+ %{mmcu=atmega3250p:crtm3250p.o%s} \
++%{mmcu=atmega328p:crtm328p.o%s} \
+ %{mmcu=atmega329:crtm329.o%s} \
+ %{mmcu=atmega329p:crtm329p.o%s} \
+ %{mmcu=atmega3290:crtm3290.o%s} \
+ %{mmcu=atmega3290p:crtm3290p.o%s} \
++%{mmcu=atmega32hvb:crtm32hvb.o%s} \
+ %{mmcu=atmega406:crtm406.o%s} \
+ %{mmcu=atmega64:crtm64.o%s} \
+ %{mmcu=atmega640:crtm640.o%s} \
+@@ -885,11 +909,14 @@
+ %{mmcu=atmega128:crtm128.o%s} \
+ %{mmcu=atmega1280:crtm1280.o%s} \
+ %{mmcu=atmega1281:crtm1281.o%s} \
++%{mmcu=atmega1284p:crtm1284p.o%s} \
+ %{mmcu=atmega8hva:crtm8hva.o%s} \
+ %{mmcu=atmega16hva:crtm16hva.o%s} \
+ %{mmcu=at90can32:crtcan32.o%s} \
+ %{mmcu=at90can64:crtcan64.o%s} \
+ %{mmcu=at90can128:crtcan128.o%s} \
++%{mmcu=at90pwm216:crt90pwm216.o%s} \
++%{mmcu=at90pwm316:crt90pwm316.o%s} \
+ %{mmcu=at90usb646:crtusb646.o%s} \
+ %{mmcu=at90usb647:crtusb647.o%s} \
+ %{mmcu=at90usb1286:crtusb1286.o%s} \
diff --git a/devel/avr-gcc-42/files/patch-os_main-os_task b/devel/avr-gcc-42/files/patch-os_main-os_task
new file mode 100644
index 000000000000..3249e512a485
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-os_main-os_task
@@ -0,0 +1,222 @@
+Index: gcc/config/avr/avr.c
+===================================================================
+--- gcc/config/avr/avr.c (revision 129730)
++++ gcc/config/avr/avr.c (working copy)
+@@ -48,6 +48,8 @@
+ #define MAX_LD_OFFSET(MODE) (64 - (signed)GET_MODE_SIZE (MODE))
+
+ static int avr_naked_function_p (tree);
++static int avr_OS_main_function_p (tree);
++static int avr_OS_task_function_p (tree);
+ static int interrupt_function_p (tree);
+ static int signal_function_p (tree);
+ static int avr_regs_to_save (HARD_REG_SET *);
+@@ -400,6 +402,33 @@
+ return a != NULL_TREE;
+ }
+
++/* Return nonzero if FUNC is a OS_main function. */
++
++static int
++avr_OS_main_function_p (tree func)
++{
++ tree a;
++
++ gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
++
++ a = lookup_attribute ("OS_main", TYPE_ATTRIBUTES (TREE_TYPE (func)));
++ return a != NULL_TREE;
++}
++
++/* Return nonzero if FUNC is a OS_task function. */
++
++static int
++avr_OS_task_function_p (tree func)
++{
++ tree a;
++
++ gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
++
++ a = lookup_attribute ("OS_task", TYPE_ATTRIBUTES (TREE_TYPE (func)));
++ return a != NULL_TREE;
++}
++
++
+ /* Return nonzero if FUNC is an interrupt function as specified
+ by the "interrupt" attribute. */
+
+@@ -445,8 +474,11 @@
+ CLEAR_HARD_REG_SET (*set);
+ count = 0;
+
+- /* No need to save any registers if the function never returns. */
+- if (TREE_THIS_VOLATILE (current_function_decl))
++ /* No need to save any registers if the function never returns or
++ is have "OS_main" or OS_task attribute. */
++ if (TREE_THIS_VOLATILE (current_function_decl)
++ || avr_OS_main_function_p (current_function_decl)
++ || avr_OS_task_function_p (current_function_decl))
+ return 0;
+
+ for (reg = 0; reg < 32; reg++)
+@@ -497,7 +529,6 @@
+ && ! interrupt_function_p (current_function_decl)
+ && ! signal_function_p (current_function_decl)
+ && ! avr_naked_function_p (current_function_decl)
+- && ! MAIN_NAME_P (DECL_NAME (current_function_decl))
+ && ! TREE_THIS_VOLATILE (current_function_decl));
+ }
+
+@@ -666,7 +697,8 @@
+ int reg;
+ int interrupt_func_p;
+ int signal_func_p;
+- int main_p;
++ int OS_main_p;
++ int OS_task_p;
+ int live_seq;
+ int minimize;
+
+@@ -684,9 +716,11 @@
+
+ interrupt_func_p = interrupt_function_p (current_function_decl);
+ signal_func_p = signal_function_p (current_function_decl);
+- main_p = MAIN_NAME_P (DECL_NAME (current_function_decl));
++ OS_main_p = avr_OS_main_function_p (current_function_decl);
++ OS_task_p = avr_OS_task_function_p (current_function_decl);
+ live_seq = sequent_regs_live ();
+ minimize = (TARGET_CALL_PROLOGUES
++ && !OS_main_p && !OS_task_p
+ && !interrupt_func_p && !signal_func_p && live_seq);
+
+ if (interrupt_func_p)
+@@ -704,19 +738,8 @@
+ AS1 (clr,__zero_reg__) "\n");
+ prologue_size += 5;
+ }
+- if (main_p)
++ if (minimize && (frame_pointer_needed || live_seq > 6))
+ {
+- fprintf (file, ("\t"
+- AS1 (ldi,r28) ",lo8(%s - " HOST_WIDE_INT_PRINT_DEC ")" CR_TAB
+- AS1 (ldi,r29) ",hi8(%s - " HOST_WIDE_INT_PRINT_DEC ")" CR_TAB
+- AS2 (out,__SP_H__,r29) CR_TAB
+- AS2 (out,__SP_L__,r28) "\n"),
+- avr_init_stack, size, avr_init_stack, size);
+-
+- prologue_size += 4;
+- }
+- else if (minimize && (frame_pointer_needed || live_seq > 6))
+- {
+ fprintf (file, ("\t"
+ AS1 (ldi, r26) ",lo8(" HOST_WIDE_INT_PRINT_DEC ")" CR_TAB
+ AS1 (ldi, r27) ",hi8(" HOST_WIDE_INT_PRINT_DEC ")" CR_TAB), size, size);
+@@ -754,12 +777,17 @@
+ }
+ if (frame_pointer_needed)
+ {
++ if (!OS_main_p && !OS_task_p)
++ {
++ fprintf (file, "\t"
++ AS1 (push,r28) CR_TAB
++ AS1 (push,r29) "\n");
++ prologue_size += 2;
++ }
+ fprintf (file, "\t"
+- AS1 (push,r28) CR_TAB
+- AS1 (push,r29) CR_TAB
+ AS2 (in,r28,__SP_L__) CR_TAB
+ AS2 (in,r29,__SP_H__) "\n");
+- prologue_size += 4;
++ prologue_size += 2;
+ if (size)
+ {
+ fputs ("\t", file);
+@@ -769,7 +797,7 @@
+ {
+ prologue_size += out_set_stack_ptr (file, 1, 1);
+ }
+- else if (signal_func_p)
++ else if (signal_func_p || OS_main_p)
+ {
+ prologue_size += out_set_stack_ptr (file, 0, 0);
+ }
+@@ -793,7 +821,8 @@
+ int reg;
+ int interrupt_func_p;
+ int signal_func_p;
+- int main_p;
++ int OS_main_p;
++ int OS_task_p;
+ int function_size;
+ int live_seq;
+ int minimize;
+@@ -825,28 +854,15 @@
+
+ interrupt_func_p = interrupt_function_p (current_function_decl);
+ signal_func_p = signal_function_p (current_function_decl);
+- main_p = MAIN_NAME_P (DECL_NAME (current_function_decl));
++ OS_main_p = avr_OS_main_function_p (current_function_decl);
++ OS_task_p = avr_OS_task_function_p (current_function_decl);
+ live_seq = sequent_regs_live ();
+ minimize = (TARGET_CALL_PROLOGUES
++ && !OS_main_p && !OS_task_p
+ && !interrupt_func_p && !signal_func_p && live_seq);
+
+- if (main_p)
++ if (minimize && (frame_pointer_needed || live_seq > 4))
+ {
+- /* Return value from main() is already in the correct registers
+- (r25:r24) as the exit() argument. */
+- if (AVR_MEGA)
+- {
+- fputs ("\t" AS1 (jmp,exit) "\n", file);
+- epilogue_size += 2;
+- }
+- else
+- {
+- fputs ("\t" AS1 (rjmp,exit) "\n", file);
+- ++epilogue_size;
+- }
+- }
+- else if (minimize && (frame_pointer_needed || live_seq > 4))
+- {
+ fprintf (file, ("\t" AS2 (ldi, r30, %d) CR_TAB), live_seq);
+ ++epilogue_size;
+ if (frame_pointer_needed)
+@@ -893,10 +909,13 @@
+ epilogue_size += out_set_stack_ptr (file, -1, -1);
+ }
+ }
+- fprintf (file, "\t"
+- AS1 (pop,r29) CR_TAB
+- AS1 (pop,r28) "\n");
+- epilogue_size += 2;
++ if (!OS_main_p && !OS_task_p)
++ {
++ fprintf (file, "\t"
++ AS1 (pop,r29) CR_TAB
++ AS1 (pop,r28) "\n");
++ epilogue_size += 2;
++ }
+ }
+
+ epilogue_size += avr_regs_to_save (&set);
+@@ -4643,6 +4662,8 @@
+ interrupt - make a function to be hardware interrupt. After function
+ prologue interrupts are enabled;
+ naked - don't generate function prologue/epilogue and `ret' command.
++ OS_main - ...
++ OS_task - ...
+
+ Only `progmem' attribute valid for type. */
+
+@@ -4653,6 +4674,8 @@
+ { "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
+ { "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
+ { "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
++ { "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
++ { "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
+ { NULL, 0, 0, false, false, false, NULL }
+ };
+
diff --git a/devel/avr-gcc-42/files/patch-zero_extend b/devel/avr-gcc-42/files/patch-zero_extend
new file mode 100644
index 000000000000..235fc0d333f6
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-zero_extend
@@ -0,0 +1,129 @@
+Index: gcc/config/avr/avr.md
+===================================================================
+--- gcc/config/avr/avr.md (revision 126148)
++++ gcc/config/avr/avr.md (working copy)
+@@ -1685,40 +1685,96 @@
+ ;; xx<---x xx<---x xx<---x xx<---x xx<---x xx<---x xx<---x xx<---x xx<---x
+ ;; zero extend
+
+-(define_insn "zero_extendqihi2"
+- [(set (match_operand:HI 0 "register_operand" "=r,r")
+- (zero_extend:HI (match_operand:QI 1 "register_operand" "0,*r")))]
++(define_insn_and_split "zero_extendqihi2"
++ [(set (match_operand:HI 0 "register_operand" "=r")
++ (zero_extend:HI (match_operand:QI 1 "register_operand" "r")))]
+ ""
+- "@
+- clr %B0
+- mov %A0,%A1\;clr %B0"
+- [(set_attr "length" "1,2")
+- (set_attr "cc" "set_n,set_n")])
++ "#"
++ "reload_completed"
++ [(set (match_dup 2) (match_dup 1))
++ (set (match_dup 3) (const_int 0))]
++ "unsigned int low_off = subreg_lowpart_offset (QImode, HImode);
++ unsigned int high_off = subreg_highpart_offset (QImode, HImode);
++
++ operands[2] = simplify_gen_subreg (QImode, operands[0], HImode, low_off);
++ operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, high_off);
++ ")
+
+-(define_insn "zero_extendqisi2"
+- [(set (match_operand:SI 0 "register_operand" "=r,r")
+- (zero_extend:SI (match_operand:QI 1 "register_operand" "0,*r")))]
++(define_insn_and_split "zero_extendqisi2"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))]
+ ""
+- "@
+- clr %B0\;clr %C0\;clr %D0
+- mov %A0,%A1\;clr %B0\;clr %C0\;clr %D0"
+- [(set_attr "length" "3,4")
+- (set_attr "cc" "set_n,set_n")])
++ "#"
++ "reload_completed"
++ [(set (match_dup 2) (zero_extend:HI (match_dup 1)))
++ (set (match_dup 3) (const_int 0))]
++ "unsigned int low_off = subreg_lowpart_offset (HImode, SImode);
++ unsigned int high_off = subreg_highpart_offset (HImode, SImode);
++
++ operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off);
++ operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off);
++ ")
+
+-(define_insn "zero_extendhisi2"
+- [(set (match_operand:SI 0 "register_operand" "=r,&r")
+- (zero_extend:SI (match_operand:HI 1 "register_operand" "0,*r")))]
++(define_insn_and_split "zero_extendhisi2"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (zero_extend:SI (match_operand:HI 1 "register_operand" "r")))]
+ ""
+- "@
+- clr %C0\;clr %D0
+- {mov %A0,%A1\;mov %B0,%B1|movw %A0,%A1}\;clr %C0\;clr %D0"
+- [(set_attr_alternative "length"
+- [(const_int 2)
+- (if_then_else (eq_attr "mcu_have_movw" "yes")
+- (const_int 3)
+- (const_int 4))])
+- (set_attr "cc" "set_n,set_n")])
++ "#"
++ "reload_completed"
++ [(set (match_dup 2) (match_dup 1))
++ (set (match_dup 3) (const_int 0))]
++ "unsigned int low_off = subreg_lowpart_offset (HImode, SImode);
++ unsigned int high_off = subreg_highpart_offset (HImode, SImode);
++
++ operands[2] = simplify_gen_subreg (HImode, operands[0], SImode, low_off);
++ operands[3] = simplify_gen_subreg (HImode, operands[0], SImode, high_off);
++ ")
+
++(define_insn_and_split "zero_extendqidi2"
++ [(set (match_operand:DI 0 "register_operand" "=r")
++ (zero_extend:DI (match_operand:QI 1 "register_operand" "r")))]
++ ""
++ "#"
++ "reload_completed"
++ [(set (match_dup 2) (zero_extend:SI (match_dup 1)))
++ (set (match_dup 3) (const_int 0))]
++ "unsigned int low_off = subreg_lowpart_offset (SImode, DImode);
++ unsigned int high_off = subreg_highpart_offset (SImode, DImode);
++
++ operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off);
++ operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off);
++ ")
++
++(define_insn_and_split "zero_extendhidi2"
++ [(set (match_operand:DI 0 "register_operand" "=r")
++ (zero_extend:DI (match_operand:HI 1 "register_operand" "r")))]
++ ""
++ "#"
++ "reload_completed"
++ [(set (match_dup 2) (zero_extend:SI (match_dup 1)))
++ (set (match_dup 3) (const_int 0))]
++ "unsigned int low_off = subreg_lowpart_offset (SImode, DImode);
++ unsigned int high_off = subreg_highpart_offset (SImode, DImode);
++
++ operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off);
++ operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off);
++ ")
++
++(define_insn_and_split "zero_extendsidi2"
++ [(set (match_operand:DI 0 "register_operand" "=r")
++ (zero_extend:DI (match_operand:SI 1 "register_operand" "r")))]
++ ""
++ "#"
++ "reload_completed"
++ [(set (match_dup 2) (match_dup 1))
++ (set (match_dup 3) (const_int 0))]
++ "unsigned int low_off = subreg_lowpart_offset (SImode, DImode);
++ unsigned int high_off = subreg_highpart_offset (SImode, DImode);
++
++ operands[2] = simplify_gen_subreg (SImode, operands[0], DImode, low_off);
++ operands[3] = simplify_gen_subreg (SImode, operands[0], DImode, high_off);
++ ")
++
+ ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=>
+ ;; compare
+
diff --git a/devel/avr-gcc-42/files/patch-zz-atmega256x b/devel/avr-gcc-42/files/patch-zz-atmega256x
new file mode 100644
index 000000000000..e51b2a44d0e5
--- /dev/null
+++ b/devel/avr-gcc-42/files/patch-zz-atmega256x
@@ -0,0 +1,361 @@
+--- gcc/config/avr/avr.c.orig Wed Dec 19 14:18:09 2007
++++ gcc/config/avr/avr.c Wed Dec 19 14:34:15 2007
+@@ -131,23 +131,28 @@
+ /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
+ int avr_have_movw_lpmx_p = 0;
+
++/* Core have 'EIJMP' and 'EICALL' instructions. */
++int avr_have_eijmp_eicall_p = 0;
++
+ struct base_arch_s {
+ int asm_only;
+ int enhanced;
+ int mega;
+ int have_movw_lpmx;
++ int have_eijmp_eicall;
+ const char *const macro;
+ };
+
+ static const struct base_arch_s avr_arch_types[] = {
+- { 1, 0, 0, 0, NULL }, /* unknown device specified */
+- { 1, 0, 0, 0, "__AVR_ARCH__=1" },
+- { 0, 0, 0, 0, "__AVR_ARCH__=2" },
+- { 0, 0, 0, 1, "__AVR_ARCH__=25"},
+- { 0, 0, 1, 0, "__AVR_ARCH__=3" },
+- { 0, 0, 1, 1, "__AVR_ARCH__=35"},
+- { 0, 1, 0, 1, "__AVR_ARCH__=4" },
+- { 0, 1, 1, 1, "__AVR_ARCH__=5" }
++ { 1, 0, 0, 0, 0, NULL }, /* unknown device specified */
++ { 1, 0, 0, 0, 0, "__AVR_ARCH__=1" },
++ { 0, 0, 0, 0, 0, "__AVR_ARCH__=2" },
++ { 0, 0, 0, 1, 0, "__AVR_ARCH__=25"},
++ { 0, 0, 1, 0, 0, "__AVR_ARCH__=3" },
++ { 0, 0, 1, 1, 0, "__AVR_ARCH__=35" },
++ { 0, 1, 0, 1, 0, "__AVR_ARCH__=4" },
++ { 0, 1, 1, 1, 0, "__AVR_ARCH__=5" },
++ { 0, 1, 1, 1, 1, "__AVR_ARCH__=6" }
+ };
+
+ /* These names are used as the index into the avr_arch_types[] table
+@@ -162,7 +167,8 @@
+ ARCH_AVR3,
+ ARCH_AVR35,
+ ARCH_AVR4,
+- ARCH_AVR5
++ ARCH_AVR5,
++ ARCH_AVR6
+ };
+
+ struct mcu_type_s {
+@@ -288,6 +294,10 @@
+ { "at90usb1286", ARCH_AVR5, "__AVR_AT90USB1286__" },
+ { "at90usb1287", ARCH_AVR5, "__AVR_AT90USB1287__" },
+ { "at94k", ARCH_AVR5, "__AVR_AT94K__" },
++ /* 3-Byte PC */
++ { "avr6", ARCH_AVR6, NULL },
++ { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__" },
++ { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__" },
+ /* Assembler only. */
+ { "avr1", ARCH_AVR1, NULL },
+ { "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__" },
+@@ -370,6 +380,7 @@
+ avr_enhanced_p = base->enhanced;
+ avr_mega_p = base->mega;
+ avr_have_movw_lpmx_p = base->have_movw_lpmx;
++ avr_have_eijmp_eicall_p = base->have_eijmp_eicall;
+ avr_base_arch_macro = base->macro;
+ avr_extra_arch_macro = t->macro;
+
+@@ -529,9 +540,10 @@
+ else
+ {
+ int offset = frame_pointer_needed ? 2 : 0;
++ int avr_pc_size = avr_have_eijmp_eicall_p ? 3 : 2;
+
+ offset += avr_regs_to_save (NULL);
+- return get_frame_size () + 2 + 1 + offset;
++ return get_frame_size () + (avr_pc_size) + 1 + offset;
+ }
+ }
+
+@@ -1139,7 +1151,7 @@
+ && ((GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (addr))
+ || GET_CODE (addr) == LABEL_REF))
+ {
+- fprintf (file, "pm(");
++ fprintf (file, "gs(");
+ output_addr_const (file,addr);
+ fprintf (file ,")");
+ }
+@@ -1164,6 +1176,11 @@
+ if (!AVR_MEGA)
+ fputc ('r', file);
+ }
++ else if (code == '!')
++ {
++ if (AVR_HAVE_EIJMP_EICALL)
++ fputc ('e', file);
++ }
+ else if (REG_P (x))
+ {
+ if (x == zero_reg_rtx)
+@@ -4560,7 +4577,7 @@
+ && ((GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FUNCTION_P (x))
+ || GET_CODE (x) == LABEL_REF))
+ {
+- fputs ("\t.word\tpm(", asm_out_file);
++ fputs ("\t.word\tgs(", asm_out_file);
+ output_addr_const (asm_out_file, x);
+ fputs (")\n", asm_out_file);
+ return true;
+@@ -5954,7 +5971,7 @@
+ {
+ switch_to_section (progmem_section);
+ if (AVR_MEGA)
+- fprintf (stream, "\t.word pm(.L%d)\n", value);
++ fprintf (stream, "\t.word gs(.L%d)\n", value);
+ else
+ fprintf (stream, "\trjmp .L%d\n", value);
+
+--- gcc/config/avr/avr.h.orig Wed Dec 19 14:18:09 2007
++++ gcc/config/avr/avr.h Wed Dec 19 14:44:32 2007
+@@ -36,6 +36,12 @@
+ builtin_define ("__AVR_HAVE_LPMX__"); \
+ if (avr_asm_only_p) \
+ builtin_define ("__AVR_ASM_ONLY__"); \
++ if (!avr_have_eijmp_eicall_p) \
++ builtin_define ("__AVR_2_BYTE_PC__"); \
++ if (avr_have_eijmp_eicall_p) \
++ builtin_define ("__AVR_3_BYTE_PC__"); \
++ if (avr_have_eijmp_eicall_p) \
++ builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
+ if (avr_enhanced_p) \
+ builtin_define ("__AVR_ENHANCED__"); \
+ if (avr_enhanced_p) \
+@@ -53,6 +59,8 @@
+ extern int avr_enhanced_p;
+ extern int avr_asm_only_p;
+ extern int avr_have_movw_lpmx_p;
++extern int avr_have_eijmp_eicall_p;
++
+ #ifndef IN_LIBGCC2
+ extern GTY(()) section *progmem_section;
+ #endif
+@@ -60,6 +68,7 @@
+ #define AVR_MEGA (avr_mega_p && !TARGET_SHORT_CALLS)
+ #define AVR_ENHANCED (avr_enhanced_p)
+ #define AVR_HAVE_MOVW (avr_have_movw_lpmx_p)
++#define AVR_HAVE_EIJMP_EICALL (avr_have_eijmp_eicall_p)
+
+ #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
+
+@@ -631,7 +640,7 @@
+
+ #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
+
+-#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~')
++#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
+
+ #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
+
+@@ -780,6 +789,7 @@
+ mmcu=at90usb6*|\
+ mmcu=at90usb12*|\
+ mmcu=at94k:-m avr5}\
++%{mmcu=atmega256*:-m avr6}\
+ %{mmcu=atmega324*|\
+ mmcu=atmega325*|\
+ mmcu=atmega328p|\
+@@ -808,7 +818,8 @@
+ mmcu=at90usb*: -Tdata 0x800100}\
+ %{mmcu=atmega640|\
+ mmcu=atmega1280|\
+- mmcu=atmega1281: -Tdata 0x800200} "
++ mmcu=atmega1281|\
++ mmcu=atmega256*: -Tdata 0x800200} "
+
+ #define LIB_SPEC \
+ "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
+@@ -910,6 +921,8 @@
+ %{mmcu=atmega1280:crtm1280.o%s} \
+ %{mmcu=atmega1281:crtm1281.o%s} \
+ %{mmcu=atmega1284p:crtm1284p.o%s} \
++%{mmcu=atmega2560:crtm2560.o%s} \
++%{mmcu=atmega2561:crtm2561.o%s} \
+ %{mmcu=atmega8hva:crtm8hva.o%s} \
+ %{mmcu=atmega16hva:crtm16hva.o%s} \
+ %{mmcu=at90can32:crtcan32.o%s} \
+--- gcc/config/avr/avr.md.orig Wed Dec 19 14:18:10 2007
++++ gcc/config/avr/avr.md Wed Dec 19 14:18:10 2007
+@@ -32,6 +32,7 @@
+ ;; p POST_INC or PRE_DEC address as a pointer (X, Y, Z)
+ ;; r POST_INC or PRE_DEC address as a register (r26, r28, r30)
+ ;; ~ Output 'r' if not AVR_MEGA.
++;; ! Output 'e' if AVR_HAVE_EIJMP_EICALL.
+
+ ;; UNSPEC usage:
+ ;; 0 Length of a string, see "strlenhi".
+@@ -2340,22 +2341,22 @@
+ "(register_operand (operands[0], HImode) || CONSTANT_P (operands[0]))"
+ "*{
+ if (which_alternative==0)
+- return \"icall\";
++ return \"%!icall\";
+ else if (which_alternative==1)
+ {
+ if (AVR_HAVE_MOVW)
+ return (AS2 (movw, r30, %0) CR_TAB
+- \"icall\");
++ \"%!icall\");
+ else
+ return (AS2 (mov, r30, %A0) CR_TAB
+ AS2 (mov, r31, %B0) CR_TAB
+- \"icall\");
++ \"%!icall\");
+ }
+ else if (which_alternative==2)
+ return AS1(%~call,%c0);
+ return (AS2 (ldi,r30,lo8(%0)) CR_TAB
+ AS2 (ldi,r31,hi8(%0)) CR_TAB
+- \"icall\");
++ \"%!icall\");
+ }"
+ [(set_attr "cc" "clobber,clobber,clobber,clobber")
+ (set_attr_alternative "length"
+@@ -2377,22 +2378,22 @@
+ "(register_operand (operands[0], VOIDmode) || CONSTANT_P (operands[0]))"
+ "*{
+ if (which_alternative==0)
+- return \"icall\";
++ return \"%!icall\";
+ else if (which_alternative==1)
+ {
+ if (AVR_HAVE_MOVW)
+ return (AS2 (movw, r30, %1) CR_TAB
+- \"icall\");
++ \"%!icall\");
+ else
+ return (AS2 (mov, r30, %A1) CR_TAB
+ AS2 (mov, r31, %B1) CR_TAB
+- \"icall\");
++ \"%!icall\");
+ }
+ else if (which_alternative==2)
+ return AS1(%~call,%c1);
+ return (AS2 (ldi, r30, lo8(%1)) CR_TAB
+ AS2 (ldi, r31, hi8(%1)) CR_TAB
+- \"icall\");
++ \"%!icall\");
+ }"
+ [(set_attr "cc" "clobber,clobber,clobber,clobber")
+ (set_attr_alternative "length"
+@@ -2422,13 +2423,20 @@
+ ; indirect jump
+ (define_insn "indirect_jump"
+ [(set (pc) (match_operand:HI 0 "register_operand" "!z,*r"))]
+- ""
++ "!AVR_HAVE_EIJMP_EICALL"
+ "@
+ ijmp
+ push %A0\;push %B0\;ret"
+ [(set_attr "length" "1,3")
+ (set_attr "cc" "none,none")])
+
++(define_insn "*indirect_jump_avr6"
++ [(set (pc) (match_operand:HI 0 "register_operand" "z"))]
++ "AVR_HAVE_EIJMP_EICALL"
++ "eijmp"
++ [(set_attr "length" "1")
++ (set_attr "cc" "none")])
++
+ ;; table jump
+
+ ;; Table made from "rjmp" instructions for <=8K devices.
+@@ -2437,7 +2445,7 @@
+ UNSPEC_INDEX_JMP))
+ (use (label_ref (match_operand 1 "" "")))
+ (clobber (match_dup 0))]
+- "!AVR_MEGA"
++ "(!AVR_MEGA) && (!AVR_HAVE_EIJMP_EICALL)"
+ "@
+ ijmp
+ push %A0\;push %B0\;ret"
+@@ -2466,7 +2474,7 @@
+ lpm __tmp_reg__,Z+
+ lpm r31,Z
+ mov r30,__tmp_reg__
+- ijmp"
++ %!ijmp"
+ [(set_attr "length" "6")
+ (set_attr "cc" "clobber")])
+
+@@ -2475,7 +2483,7 @@
+ UNSPEC_INDEX_JMP))
+ (use (label_ref (match_operand 1 "" "")))
+ (clobber (match_dup 0))]
+- "AVR_MEGA"
++ "AVR_MEGA && !AVR_HAVE_EIJMP_EICALL"
+ "lsl r30
+ rol r31
+ lpm
+--- gcc/config/avr/libgcc.S.orig Mon Jun 19 17:04:27 2006
++++ gcc/config/avr/libgcc.S Wed Dec 19 14:18:10 2007
+@@ -593,7 +593,12 @@
+ out __SP_H__,r29
+ out __SREG__,__tmp_reg__
+ out __SP_L__,r28
++#if defined (__AVR_HAVE_EIJMP_EICALL__)
++ eijmp
++#else
+ ijmp
++#endif
++
+ .endfunc
+ #endif /* defined (L_prologue) */
+
+@@ -672,13 +677,22 @@
+ lpm __tmp_reg__, Z+
+ lpm r31, Z
+ mov r30, __tmp_reg__
++
++#if defined (__AVR_HAVE_EIJMP_EICALL__)
++ eijmp
++#else
+ ijmp
++#endif
++
+ #else
+ lpm
+ adiw r30, 1
+ push r0
+ lpm
+ push r0
++#if defined (__AVR_HAVE_EIJMP_EICALL__)
++ push __zero_reg__
++#endif
+ ret
+ #endif
+ .endfunc
+--- gcc/config/avr/t-avr.orig Wed Dec 19 14:18:09 2007
++++ gcc/config/avr/t-avr Wed Dec 19 14:30:07 2007
+@@ -37,8 +37,8 @@
+
+ FPBIT = fp-bit.c
+
+-MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr35/mmcu=avr4/mmcu=avr5
+-MULTILIB_DIRNAMES = avr2 avr25 avr3 avr35 avr4 avr5
++MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr6
++MULTILIB_DIRNAMES = avr2 avr25 avr3 avr35 avr4 avr5 avr6
+
+ # The many avr2 matches are not listed here - this is the default.
+ MULTILIB_MATCHES = \
+@@ -124,7 +124,9 @@
+ mmcu?avr5=mmcu?at90usb647 \
+ mmcu?avr5=mmcu?at90usb1286 \
+ mmcu?avr5=mmcu?at90usb1287 \
+- mmcu?avr5=mmcu?at94k
++ mmcu?avr5=mmcu?at94k \
++ mmcu?avr6=mmcu?atmega2560 \
++ mmcu?avr6=mmcu?atmega2561
+
+ MULTILIB_EXCEPTIONS =
diff --git a/devel/avr-gcc-42/pkg-descr b/devel/avr-gcc-42/pkg-descr
new file mode 100644
index 000000000000..0471f981c4d2
--- /dev/null
+++ b/devel/avr-gcc-42/pkg-descr
@@ -0,0 +1,22 @@
+FSF gcc-4.x for Atmel AVR cross-development
+
+Included is the basic C++ compiler, although this is only of limited
+use without a libstdc++, and it is little tested.
+
+Supported debugging formats: -gdwarf-2 [default], -gstabs
+Local patch added: recognizes 0bXXX binary constants
+Local patch added: OS_main and OS_task attributes
+
+Locally added support for the following AVR devices:
+
+ ATtiny43U
+ ATtiny48/88
+ AT90PWM2B/PWM3B
+ AT90PWM216/PWM316
+ ATmega48P/88P/168P/328P
+ ATmega32HVB
+ ATmega1284
+ ATmega2560/ATmega2561
+
+WWW: http://gcc.gnu.org/
+WWW: http://www.nongnu.org/avr-libc/
diff --git a/devel/avr-gcc-42/pkg-plist b/devel/avr-gcc-42/pkg-plist
new file mode 100644
index 000000000000..617ec75e72ef
--- /dev/null
+++ b/devel/avr-gcc-42/pkg-plist
@@ -0,0 +1,106 @@
+avr/bin/c++
+avr/bin/g++
+avr/bin/gcc
+bin/avr-c++
+bin/avr-cpp
+bin/avr-g++
+bin/avr-gcc
+bin/avr-gcc-4.2.2
+bin/avr-gccbug
+lib/gcc/avr/4.2.2/avr25/libgcc.a
+lib/gcc/avr/4.2.2/avr25/libgcov.a
+lib/gcc/avr/4.2.2/avr3/libgcc.a
+lib/gcc/avr/4.2.2/avr3/libgcov.a
+lib/gcc/avr/4.2.2/avr35/libgcc.a
+lib/gcc/avr/4.2.2/avr35/libgcov.a
+lib/gcc/avr/4.2.2/avr4/libgcc.a
+lib/gcc/avr/4.2.2/avr4/libgcov.a
+lib/gcc/avr/4.2.2/avr5/libgcc.a
+lib/gcc/avr/4.2.2/avr5/libgcov.a
+lib/gcc/avr/4.2.2/avr6/libgcc.a
+lib/gcc/avr/4.2.2/avr6/libgcov.a
+lib/gcc/avr/4.2.2/include/README
+lib/gcc/avr/4.2.2/include/decfloat.h
+lib/gcc/avr/4.2.2/include/fixed
+lib/gcc/avr/4.2.2/include/float.h
+lib/gcc/avr/4.2.2/include/iso646.h
+lib/gcc/avr/4.2.2/include/limits.h
+lib/gcc/avr/4.2.2/include/stdarg.h
+lib/gcc/avr/4.2.2/include/stdbool.h
+lib/gcc/avr/4.2.2/include/stddef.h
+lib/gcc/avr/4.2.2/include/syslimits.h
+lib/gcc/avr/4.2.2/include/unwind.h
+lib/gcc/avr/4.2.2/include/varargs.h
+lib/gcc/avr/4.2.2/install-tools/gsyslimits.h
+lib/gcc/avr/4.2.2/install-tools/include/README
+lib/gcc/avr/4.2.2/install-tools/include/decfloat.h
+lib/gcc/avr/4.2.2/install-tools/include/float.h
+lib/gcc/avr/4.2.2/install-tools/include/iso646.h
+lib/gcc/avr/4.2.2/install-tools/include/limits.h
+lib/gcc/avr/4.2.2/install-tools/include/stdarg.h
+lib/gcc/avr/4.2.2/install-tools/include/stdbool.h
+lib/gcc/avr/4.2.2/install-tools/include/stddef.h
+lib/gcc/avr/4.2.2/install-tools/include/unwind.h
+lib/gcc/avr/4.2.2/install-tools/include/varargs.h
+lib/gcc/avr/4.2.2/install-tools/macro_list
+lib/gcc/avr/4.2.2/install-tools/mkheaders.conf
+lib/gcc/avr/4.2.2/libgcc.a
+lib/gcc/avr/4.2.2/libgcov.a
+libexec/gcc/avr/4.2.2/cc1
+libexec/gcc/avr/4.2.2/cc1plus
+libexec/gcc/avr/4.2.2/collect2
+libexec/gcc/avr/4.2.2/install-tools/fix-header
+libexec/gcc/avr/4.2.2/install-tools/fixinc.sh
+libexec/gcc/avr/4.2.2/install-tools/fixincl
+libexec/gcc/avr/4.2.2/install-tools/fixproto
+libexec/gcc/avr/4.2.2/install-tools/mkheaders
+share/locale/be/LC_MESSAGES/cpplib.mo
+share/locale/be/LC_MESSAGES/gcc.mo
+share/locale/ca/LC_MESSAGES/cpplib.mo
+share/locale/ca/LC_MESSAGES/gcc.mo
+share/locale/da/LC_MESSAGES/cpplib.mo
+share/locale/da/LC_MESSAGES/gcc.mo
+share/locale/de/LC_MESSAGES/cpplib.mo
+share/locale/de/LC_MESSAGES/gcc.mo
+share/locale/el/LC_MESSAGES/cpplib.mo
+share/locale/el/LC_MESSAGES/gcc.mo
+share/locale/es/LC_MESSAGES/cpplib.mo
+share/locale/es/LC_MESSAGES/gcc.mo
+share/locale/fr/LC_MESSAGES/cpplib.mo
+share/locale/fr/LC_MESSAGES/gcc.mo
+share/locale/ja/LC_MESSAGES/cpplib.mo
+share/locale/ja/LC_MESSAGES/gcc.mo
+share/locale/nl/LC_MESSAGES/cpplib.mo
+share/locale/nl/LC_MESSAGES/gcc.mo
+share/locale/ru/LC_MESSAGES/gcc.mo
+share/locale/rw/LC_MESSAGES/cpplib.mo
+share/locale/rw/LC_MESSAGES/gcc.mo
+share/locale/sr/LC_MESSAGES/gcc.mo
+share/locale/sv/LC_MESSAGES/cpplib.mo
+share/locale/sv/LC_MESSAGES/gcc.mo
+share/locale/tr/LC_MESSAGES/cpplib.mo
+share/locale/tr/LC_MESSAGES/gcc.mo
+share/locale/uk/LC_MESSAGES/cpplib.mo
+share/locale/vi/LC_MESSAGES/cpplib.mo
+share/locale/zh_CN/LC_MESSAGES/cpplib.mo
+share/locale/zh_CN/LC_MESSAGES/gcc.mo
+share/locale/zh_TW/LC_MESSAGES/cpplib.mo
+share/locale/zh_TW/LC_MESSAGES/gcc.mo
+@dirrmtry share/locale/rw/LC_MESSAGES
+@dirrmtry share/locale/rw
+@dirrm lib/gcc/avr/4.2.2/avr25
+@dirrm lib/gcc/avr/4.2.2/avr3
+@dirrm lib/gcc/avr/4.2.2/avr35
+@dirrm lib/gcc/avr/4.2.2/avr4
+@dirrm lib/gcc/avr/4.2.2/avr5
+@dirrm lib/gcc/avr/4.2.2/avr6
+@dirrm lib/gcc/avr/4.2.2/include
+@dirrm lib/gcc/avr/4.2.2/install-tools/include
+@dirrm lib/gcc/avr/4.2.2/install-tools
+@dirrm lib/gcc/avr/4.2.2
+@dirrm lib/gcc/avr
+@dirrm lib/gcc
+@dirrm libexec/gcc/avr/4.2.2/install-tools
+@dirrm libexec/gcc/avr/4.2.2
+@dirrm libexec/gcc/avr
+@dirrm libexec/gcc
generated by cgit (git 2.34.1) at 2024-11-08 07:47:42 +0800