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| author | pawel <pawel@FreeBSD.org> | 2011-11-05 02:16:30 +0800 |
|---|---|---|
| committer | pawel <pawel@FreeBSD.org> | 2011-11-05 02:16:30 +0800 |
| commit | 187a3bb8dd81a85728a6a4a6d55415f1c9eb6d75 (patch) | |
| tree | ecc063d3eabd52b1b44475becc91d23416fa74aa /cad/iverilog | |
| parent | f64ee42cd12681db2b1841cf0e9f5030647be33b (diff) | |
| download | freebsd-ports-graphics-187a3bb8dd81a85728a6a4a6d55415f1c9eb6d75.tar.gz freebsd-ports-graphics-187a3bb8dd81a85728a6a4a6d55415f1c9eb6d75.tar.zst freebsd-ports-graphics-187a3bb8dd81a85728a6a4a6d55415f1c9eb6d75.zip | |
- Update to version 0.9.5
- Add LICENSE
- Update project homepage
PR: ports/162280
Submitted by: Niclas Zeising <niclas.zeising@gmail.com> (maintainer)
Diffstat (limited to 'cad/iverilog')
| -rw-r--r-- | cad/iverilog/Makefile | 4 | ||||
| -rw-r--r-- | cad/iverilog/distinfo | 4 | ||||
| -rw-r--r-- | cad/iverilog/pkg-descr | 2 |
3 files changed, 6 insertions, 4 deletions
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile index 21b72674f0c..e0efb2a1948 100644 --- a/cad/iverilog/Makefile +++ b/cad/iverilog/Makefile @@ -7,7 +7,7 @@ # PORTNAME= iverilog -PORTVERSION= 0.9.4 +PORTVERSION= 0.9.5 CATEGORIES= cad MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]$,,}/ \ ftp://ftp.geda.seul.org/pub/geda/dist/ @@ -16,6 +16,8 @@ DISTNAME= verilog-${PORTVERSION} MAINTAINER= niclas.zeising@gmail.com COMMENT= A Verilog simulation and synthesis tool +LICENSE= GPLv2 + GNU_CONFIGURE= yes USE_BISON= build USE_GMAKE= yes diff --git a/cad/iverilog/distinfo b/cad/iverilog/distinfo index 7f3d37efdf4..b2103962271 100644 --- a/cad/iverilog/distinfo +++ b/cad/iverilog/distinfo @@ -1,2 +1,2 @@ -SHA256 (verilog-0.9.4.tar.gz) = b4eac7276975cf2d7c2c94246f733dc187feb4d5944034d053c5094279511eb1 -SIZE (verilog-0.9.4.tar.gz) = 1200614 +SHA256 (verilog-0.9.5.tar.gz) = c522b8b873f0cf77003db15c3df0f4a15b738ce4b060d1ca387c88e1b2be185d +SIZE (verilog-0.9.5.tar.gz) = 1212112 diff --git a/cad/iverilog/pkg-descr b/cad/iverilog/pkg-descr index cdc2c152ac1..d11b892e079 100644 --- a/cad/iverilog/pkg-descr +++ b/cad/iverilog/pkg-descr @@ -12,4 +12,4 @@ standard proper is due to be release towards the middle of the year 2000. This is a fairly large and complex standard, so it will take some time for it to get there, but that's the goal. -WWW: http://www.icarus.com/eda/verilog/ +WWW: http://iverilog.icarus.com/ |