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Index: nv_driver.c
===================================================================
RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v
retrieving revision 1.16
retrieving revision 1.18
diff -u -u -r1.16 -r1.18
--- programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c 11 Jul 2005 02:29:57 -0000 1.16
+++ programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c 29 Sep 2005 21:47:29 -0000 1.18
@@ -1,4 +1,4 @@
-/* $XdotOrg: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.16 2005/07/11 02:29:57 ajax Exp $ */
+/* $XdotOrg: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.18 2005/09/29 21:47:29 aplattner Exp $ */
/* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
/*
* Copyright 1996-1997 David J. McKay
@@ -87,6 +87,8 @@
0
};
+/* Known cards as of 2005/09/21 */
+
static SymTabRec NVKnownChipsets[] =
{
{ 0x12D20018, "RIVA 128" },
@@ -205,7 +207,7 @@
#else
{ 0x10DE0329, "0x0329" },
#endif
- { 0x10DE032A, "Quadro NVS 280 PCI" },
+ { 0x10DE032A, "Quadro NVS 55/280 PCI" },
{ 0x10DE032B, "Quadro FX 500/600 PCI" },
{ 0x10DE032C, "GeForce FX Go53xx Series" },
{ 0x10DE032D, "GeForce FX Go5100" },
@@ -238,12 +240,14 @@
{ 0x10DE0043, "0x0043" },
{ 0x10DE0045, "GeForce 6800 GT" },
{ 0x10DE0046, "GeForce 6800 GT" },
+ { 0x10DE0048, "GeForce 6800 XT" },
{ 0x10DE0049, "0x0049" },
{ 0x10DE004E, "Quadro FX 4000" },
{ 0x10DE00C0, "0x00C0" },
{ 0x10DE00C1, "GeForce 6800" },
{ 0x10DE00C2, "GeForce 6800 LE" },
+ { 0x10DE00C3, "GeForce 6800 XT" },
{ 0x10DE00C8, "GeForce Go 6800" },
{ 0x10DE00C9, "GeForce Go 6800 Ultra" },
{ 0x10DE00CC, "Quadro FX Go1400" },
@@ -266,16 +270,16 @@
{ 0x10DE014E, "Quadro FX 540" },
{ 0x10DE014F, "GeForce 6200" },
- { 0x10DE0160, "0x0160" },
+ { 0x10DE0160, "GeForce 6500" },
{ 0x10DE0161, "GeForce 6200 TurboCache(TM)" },
{ 0x10DE0162, "GeForce 6200SE TurboCache(TM)" },
- { 0x10DE0163, "0x0163" },
+ { 0x10DE0163, "GeForce 6200 LE" },
{ 0x10DE0164, "GeForce Go 6200" },
{ 0x10DE0165, "Quadro NVS 285" },
{ 0x10DE0166, "GeForce Go 6400" },
{ 0x10DE0167, "GeForce Go 6200" },
{ 0x10DE0168, "GeForce Go 6400" },
- { 0x10DE0169, "0x0169" },
+ { 0x10DE0169, "GeForce 6250" },
{ 0x10DE016B, "0x016B" },
{ 0x10DE016C, "0x016C" },
{ 0x10DE016D, "0x016D" },
@@ -293,10 +297,10 @@
{ 0x10DE0090, "0x0090" },
{ 0x10DE0091, "GeForce 7800 GTX" },
- { 0x10DE0092, "0x0092" },
+ { 0x10DE0092, "GeForce 7800 GT" },
{ 0x10DE0093, "0x0093" },
{ 0x10DE0094, "0x0094" },
- { 0x10DE0098, "0x0098" },
+ { 0x10DE0098, "GeForce Go 7800" },
{ 0x10DE0099, "GeForce Go 7800 GTX" },
{ 0x10DE009C, "0x009C" },
{ 0x10DE009D, "Quadro FX 4500" },
@@ -699,6 +703,8 @@
case 0x0210:
case 0x0220:
case 0x0230:
+ case 0x0290:
+ case 0x0390:
NVChipsets[numUsed].token = pciid;
NVChipsets[numUsed].name = "Unknown NVIDIA chip";
NVPciChipsets[numUsed].numChipset = pciid;
@@ -1389,6 +1395,8 @@
case 0x0210:
case 0x0220:
case 0x0230:
+ case 0x0290:
+ case 0x0390:
pNv->Architecture = NV_ARCH_40;
break;
default:
@@ -1425,9 +1433,13 @@
}
}
- pNv->FbUsableSize = pNv->FbMapSize - (128 * 1024);
+ if(pNv->Architecture >= NV_ARCH_40)
+ pNv->FbUsableSize = pNv->FbMapSize - (560 * 1024);
+ else
+ pNv->FbUsableSize = pNv->FbMapSize - (128 * 1024);
pNv->ScratchBufferSize = (pNv->Architecture < NV_ARCH_10) ? 8192 : 16384;
pNv->ScratchBufferStart = pNv->FbUsableSize - pNv->ScratchBufferSize;
+ pNv->CursorStart = pNv->FbUsableSize + (32 * 1024);
/*
* Setup the ClockRanges, which describe what clock ranges are available,
Index: nv_hw.c
===================================================================
RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v
retrieving revision 1.7
retrieving revision 1.11
diff -u -u -r1.7 -r1.11
--- programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c 11 Jul 2005 02:29:58 -0000 1.7
+++ programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c 29 Sep 2005 21:47:29 -0000 1.11
@@ -919,7 +919,7 @@
RIVA_HW_STATE *state
)
{
- int i;
+ int i, j;
pNv->PMC[0x0140/4] = 0x00000000;
pNv->PMC[0x0200/4] = 0xFFFF00FF;
@@ -932,16 +932,28 @@
if(pNv->Architecture == NV_ARCH_04) {
pNv->PFB[0x0200/4] = state->config;
- } else if ((pNv->Chipset & 0xfff0) == 0x0090) {
- for(i = 0; i < 15; i++) {
- pNv->PFB[(0x0600 + (i * 0x10))/4] = 0;
- pNv->PFB[(0x0604 + (i * 0x10))/4] = pNv->FbMapSize - 1;
- }
- } else {
+ } else
+ if((pNv->Architecture < NV_ARCH_40) ||
+ ((pNv->Chipset & 0xfff0) == 0x0040))
+ {
for(i = 0; i < 8; i++) {
pNv->PFB[(0x0240 + (i * 0x10))/4] = 0;
pNv->PFB[(0x0244 + (i * 0x10))/4] = pNv->FbMapSize - 1;
}
+ } else {
+ int regions = 12;
+
+ if(((pNv->Chipset & 0xfff0) == 0x0090) ||
+ ((pNv->Chipset & 0xfff0) == 0x01D0) ||
+ ((pNv->Chipset & 0xfff0) == 0x0290))
+ {
+ regions = 15;
+ }
+
+ for(i = 0; i < regions; i++) {
+ pNv->PFB[(0x0600 + (i * 0x10))/4] = 0;
+ pNv->PFB[(0x0604 + (i * 0x10))/4] = pNv->FbMapSize - 1;
+ }
}
if(pNv->Architecture >= NV_ARCH_40) {
@@ -1160,6 +1172,12 @@
pNv->PGRAPH[0x0090/4] = 0x00008000;
pNv->PGRAPH[0x0610/4] = 0x00be3c5f;
+ j = pNv->REGS[0x1540/4] & 0xff;
+ if(j) {
+ for(i = 0; !(j & 1); j >>= 1, i++);
+ pNv->PGRAPH[0x5000/4] = i;
+ }
+
if((pNv->Chipset & 0xfff0) == 0x0040) {
pNv->PGRAPH[0x09b0/4] = 0x83280fff;
pNv->PGRAPH[0x09b4/4] = 0x000000a0;
@@ -1176,6 +1194,7 @@
pNv->PFB[0x033C/4] &= 0xffff7fff;
break;
case 0x00C0:
+ case 0x0120:
pNv->PGRAPH[0x0828/4] = 0x007596ff;
pNv->PGRAPH[0x082C/4] = 0x00000108;
break;
@@ -1200,6 +1219,7 @@
pNv->PRAMDAC[0x0608/4] |= 0x00100000;
break;
case 0x0090:
+ case 0x0290:
pNv->PRAMDAC[0x0608/4] |= 0x00100000;
pNv->PGRAPH[0x0828/4] = 0x07830610;
pNv->PGRAPH[0x082C/4] = 0x0000016A;
@@ -1247,12 +1267,32 @@
}
}
- if((pNv->Chipset & 0xfff0) == 0x0090) {
- for(i = 0; i < 60; i++)
- pNv->PGRAPH[(0x0D00/4) + i] = pNv->PFB[(0x0600/4) + i];
- } else {
- for(i = 0; i < 32; i++)
+ if((pNv->Architecture < NV_ARCH_40) ||
+ ((pNv->Chipset & 0xfff0) == 0x0040))
+ {
+ for(i = 0; i < 32; i++) {
pNv->PGRAPH[(0x0900/4) + i] = pNv->PFB[(0x0240/4) + i];
+ pNv->PGRAPH[(0x6900/4) + i] = pNv->PFB[(0x0240/4) + i];
+ }
+ } else {
+ if(((pNv->Chipset & 0xfff0) == 0x0090) ||
+ ((pNv->Chipset & 0xfff0) == 0x01D0) ||
+ ((pNv->Chipset & 0xfff0) == 0x0290))
+ {
+ for(i = 0; i < 60; i++) {
+ pNv->PGRAPH[(0x0D00/4) + i] = pNv->PFB[(0x0600/4) + i];
+ pNv->PGRAPH[(0x6900/4) + i] = pNv->PFB[(0x0600/4) + i];
+ }
+ } else {
+ for(i = 0; i < 48; i++) {
+ pNv->PGRAPH[(0x0900/4) + i] = pNv->PFB[(0x0600/4) + i];
+ if(((pNv->Chipset & 0xfff0) != 0x0160) &&
+ ((pNv->Chipset & 0xfff0) != 0x0220))
+ {
+ pNv->PGRAPH[(0x6900/4) + i] = pNv->PFB[(0x0600/4) + i];
+ }
+ }
+ }
}
if(pNv->Architecture >= NV_ARCH_40) {
@@ -1267,7 +1307,10 @@
pNv->PGRAPH[0x0864/4] = pNv->FbMapSize - 1;
pNv->PGRAPH[0x0868/4] = pNv->FbMapSize - 1;
} else {
- if((pNv->Chipset & 0xfff0) == 0x0090) {
+ if(((pNv->Chipset & 0xfff0) == 0x0090) ||
+ ((pNv->Chipset & 0xfff0) == 0x01D0) ||
+ ((pNv->Chipset & 0xfff0) == 0x0290))
+ {
pNv->PGRAPH[0x0DF0/4] = pNv->PFB[0x0200/4];
pNv->PGRAPH[0x0DF4/4] = pNv->PFB[0x0204/4];
} else {
Index: nv_setup.c
===================================================================
RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v
retrieving revision 1.8
retrieving revision 1.10
diff -u -u -r1.8 -r1.10
--- programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c 5 Aug 2005 03:52:28 -0000 1.8
+++ programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c 29 Sep 2005 21:47:29 -0000 1.10
@@ -317,7 +317,6 @@
pNv->CrystalFreqKHz = 27000;
}
- pNv->CursorStart = (pNv->RamAmountKBytes - 96) * 1024;
pNv->CURSOR = NULL; /* can't set this here */
pNv->MinVClockFreqKHz = 12000;
pNv->MaxVClockFreqKHz = pNv->twoStagePLL ? 400000 : 350000;
@@ -448,6 +447,7 @@
case 0x0144:
case 0x0146:
case 0x0148:
+ case 0x0098:
case 0x0099:
mobile = TRUE;
break;
|
